Datasheet

TAS5414A, TAS5424A
www.ti.com SLOS535C –MAY 2009– REVISED APRIL 2011
ELECTRICAL CHARACTERISTICS
Test conditions (unless otherwise noted): T
Case
= 25°C, PVDD = 14.4 V, R
L
= 4 Ω, f
S
= 417 kHz, P
out
= 1 W/ch, Rext = 20 kΩ,
AES17 Filter, master mode operation (see application diagram)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OPERATING CURRENT
I
PVDD_IDLE
All four channels running in MUTE mode 240 300
PVDD idle current mA
I
PVDD_Hi-Z
All four channels in Hi-Z mode 80
I
PVDD_STBY
PVDD standby current STANDBY mode, T
J
≤ 85°C 2 20 μA
OUTPUT POWER
4 Ω, PVDD = 14.4 V, THD+N ≤ 1%, 1 kHz, T
c
= 75°C 23
4 Ω, PVDD = 14.4 V, THD+N = 10%, 1 kHz, T
c
= 75°C 25 28
4 Ω, PVDD = 14.4 V, square wave, 1 kHz, T
c
= 75°C 43
4 Ω, PVDD = 21 V, THD+N = 1%, 1 kHz, T
c
= 75°C 47
4 Ω, PVDD = 21 V, THD+N = 10%, 1 kHz, T
c
= 75°C 50 58
2 Ω, PVDD = 14.4 V, THD+N = 1%, 1 kHz, T
c
= 75°C 38
P
OUT
Output power per channel W
2 Ω, PVDD = 14.4 V, THD+N = 10%, 1 kHz, T
c
= 75°C 40 45
2 Ω, PVDD = 14.4 V, square wave 1 kHz, T
c
= 75°C 70
PBTL 2-Ω operation, PVDD = 21 V, THD+N = 10%,
116
1 kHz, T
c
= 75°C
PBTL 1-Ω operation, PVDD = 14.4 V, THD+N = 10%,
90
1 kHz, T
c
= 75°C
4 channels operating, 23-W output power/ch, L = 10 μH,
EFF
P
Power efficiency 90%
T
J
≤ 85°C
AUDIO PERFORMANCE
V
NOISE
Noise voltage at output G = 26 dB, zero input, and A-weighting 60 100 μV
Crosstalk Channel crosstalk 1 W, G = 26 dB, 1 kHz 60 75 dB
CMRR
5424
Common-mode rejection ratio (TAS5424A) 1 kHz, 1 Vrms referenced to GND, G = 26 dB 60 75 dB
PSRR Power supply rejection ratio G = 26 dB, PVDD = 14.4 Vdc + 1 Vrms, f = 1 kHz 60 75 dB
THD+N Total harmonic distortion + noise P = 1 W, G = 26 dB, f = 1 kHz, 0°C ≤ T
J
≤ 75°C 0.02% 0.1%
336 357 378
Switching frequency selectable for AM interference
f
S
Switching frequency 392 417 442 kHz
avoidance
470 500 530
R
AIN
Analog input resistance Internal shunt resistance on each input pin 60 80 100 kΩ
V
CM_INT
Internal common-mode input bias voltage Internal bias applied to IN_M pin 3.25 V
11 12 13
19 20 21
Source impedance = 0 Ω, gain measurement taken at 1
G Voltage gain (V
O
/V
IN
) dB
W of power per channel
25 26 27
31 32 33
G
CH
Channel-to-channel variation Any gain commanded –1 0 1 dB
t
CM
Output-voltage common-mode ramping time External C
MUTE
= 330 nF 35 ms
t
GAIN
Gain ramping time External C
MUTE
= 330 nF 30 ms
PWM OUTPUT STAGE
R
DS(on)
FET drain-to-source resistance Not including bond wire resistance, T
J
= 25°C 75 95 mΩ
Zero input signal, dc offset reduction enabled, and
V
O_OFFSET
Output offset voltage ±10 ±25 mV
G = 26 dB
PVDD OVERVOLTAGE (OV) PROTECTION
V
OV
PVDD overvoltage shutdown 22.1 23.7 26.3 V
LOAD DUMP (LD) PROTECTION
V
LD_SD_SET
Load-dump shutdown voltage 26.6 29 32 V
V
LD_SD_CLEAR
Recovery voltage for load-dump shutdown 23.5 26.4 28.4 V
PVDD UNDERVOLTAGE (UV) PROTECTION
V
UV_SET
PVDD undervoltage shutdown 6.5 7 7.5 V
V
UV_CLEAR
Recovery voltage for PVDD UV 7 7.5 8 V
AVDD
V
A_BYP
A_BYP pin voltage 6.5 V
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