Datasheet

   
   
 
SLOS175B − FEBRUARY 1997 − REVISED JANUARY 2008
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC2201Y chip information
This chip, when properly assembled, displays characteristics similar to the TLC2201C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding path. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T
J
max = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACK SIDE OF CHIP.
TERMINAL NUMBERS ARE FOR THE
D, JG, AND P PACKAGES.
+
−
OUT
IN−
IN+
V
DD+
(7)
(2)
(3)
(6)
(4)
V
DD−
65
77
(2) (3) (4)
(6)(7)(8)
(1)