Datasheet

TLC1541
10-BIT ANALOG-TO-DIGITAL CONVERTER
WITH SERIAL CONTROL AND 11 INPUTS
SLAS073C – DECEMBER 1995 – REVISED AUGUST 1996
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics over recommended operating temperature range,
V
CC
= V
ref+
= 4.75 V to 5.5 V, f
clock(I/O)
= 1.1 MHz, f
clock(SYS)
= 2.1 MHz
PARAMETER TEST CONDITIONS MIN MAX UNIT
E
L
Linearity error See Note 5 ±1 LSB
E
ZS
Zero-scale error See Notes 2 and 6 ±1 LSB
E
FS
Full-scale error See Notes 2 and 6 ±1 LSB
E
T
Total unadjusted error See Note 7 ±1 LSB
Self-test output code Input A11 address = 1011 (see Note 8)
0111110100
(500)
1000001100
(524)
t
conv
Conversion time 21 µs
Total access and conversion time 31 µs
Channel acquisition time (sample cycle) See Operating Sequence 6
I/O
clock
cycles
t
v
Time output data remains valid after I/O
CLOCK↓
10 ns
t
d
Delay time, I/O CLOCK↓ to DATA OUT valid 400 ns
t
en
Output enable time 150 ns
t
dis
Output disable time
See Figure 1
150 ns
t
r(bus)
Data bus rise time 300 ns
t
f(bus)
Data bus fall time 300 ns
NOTES: 2. Analog input voltages greater than that applied to REF+ convert as all ones (1111111111), while input voltages less than that applied
to REF– convert as all zeros (0000000000). For proper operation, REF+ voltage must be at least 1 V higher than REF– voltage.
Also, the total unadjusted error may increase as this differential reference voltage falls below 4.75 V.
5. Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.
6. Zero-scale error is the difference between 0000000000 and the converted output for zero input voltage; full-scale error is the
difference between 1111111111 and the converted output for full-scale input voltage.
7. Total unadjusted error includes linearity, zero-scale, and full-scale errors.
8. Both the input address and the output codes are expressed in positive logic. The A11 analog input signal is internally generated and
used for test purposes.