Datasheet

TLC1541

10-BIT ANALOG-TO-DIGITAL CONVERTER

WITH SERIAL CONTROL AND 11 INPUTS

SLAS073C – DECEMBER 1995 – REVISED AUGUST 1996

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

It is possible to connect SYSTEM CLOCK and I/O CLOCK together in special situations in which controlling-circuitry

points must be minimized. In this case, the following special points must be considered in addition to the requirements

of the normal control sequence previously described.

1. This device requires the first two clocks to recognize that CS

is at a valid low level when the common clock

signal is used as an I/O CLOCK. When CS

is recognized by the device to be at a high level, the common clock

signal is used for the conversion clock also.

2. A low CS

must be recognized before the I/O CLOCK can shift in an analog channel address. The device

recognizes a CS

transition when the SYSTEM CLOCK terminal receives two positive edges and then a

negative edge. For this reason, after a CS

negative edge, the first two clock cycles do not shift in the address.

Also, upon shifting in the address, CS

must be raised after the tenth valid (12 total) I/O CLOCK. Otherwise,

additional common-clock cycles are recognized as I/O CLOCK cycles and shift in an erroneous address.

For certain applications, such as strobing applications, it is necessary to start conversion at a specific point in time.

This device accommodates these applications. Although the on-chip sample-and-hold begins sampling upon the

negative edge of the fourth valid I/O CLOCK cycle, the hold function does not initiate until the negative edge of the

tenth valid I/O CLOCK cycle. Thus, the control circuitry can leave the I/O CLOCK signal in its high state during the

tenth valid I/O CLOCK cycle until the moment at which the analog signal must be converted. The TLC1541 continues

sampling the analog input until the eighth valid falling edge of the I/O CLOCK. The control circuitry or software then

immediately lowers the I/O CLOCK signal and holds the analog signal at the desired point in time and starts the

conversion.