Datasheet
TLC1514, TLC1518
5-V, 10-BIT, 400 KSPS, 4/8 CHANNEL, LOW POWER,
SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN
SLAS252 – DECEMBER 1999
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
R
s
r
i
V
S
V
C
Driving Source
†
TLC1514/18
C
i
V
I
V
I
= Input Voltage at AIN
V
S
= External Driving Source Voltage
R
s
= Source Resistance
r
i
= Input Resistance (MUX on Resistance)
C
i
= Input Capacitance
V
C
= Capacitance Charging Voltage
†
Driving source requirements:
• Noise and distortion for the source must be equivalent to the resolution of the converter.
• R
s
must be real at the input frequency.
Figure 38. Equivalent Input Circuit Including the Driving Source
maximum conversion throughput
For a supply voltage of 5 V, if the source impedance is less than 1 kΩ, and the ADC analog input capacitance
Ci is less than 50 pF, this equates to a minimum sampling time tch(0.5 LSB) of 0.571 µs. Since the sampling
time requires 12 SCLKs, the fastest SCLK frequency is 12/tch = 20 MHz.
The minimal total cycle time is given as:
tc tcommand tch tconv td
(
EOCH–CSL
)
4
1
f
(
SCLK
)
12
1
f
(
SCLK
)
1.4
s
0.1
s
16
1
20
MHz
1.5
s
2.3
s
This is equivalent to a maximum throughput of 400 KSPS. The throughput can be even higher with a smaller
source impedance.