Datasheet

TL783
HIGH-VOLTAGE ADJUSTABLE REGULATOR
SLVS036D – SEPTEMBER 1981 – REVISED AUGUST 1999
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 13
T
J
= 25°C
C
o
= 0
C
o
= 10 µF
01 2 34
Time – µs
– Output Voltage Deviation – VV
O
Change in Input Voltage – V
0.4
0.2
0
–0.2
1
0.5
0
LINE TRANSIENT RESPONSE
∆
Figure 14
V
I
= 35 V
V
O
= 10 V
C
o
= 1 µF
T
J
= 25°C
– Output Current – AI
O
6
4
2
0
–2
–4
–6
0.8
0.6
0.4
0.2
0
0 40 80 120 160 200 240
Time – µs
LOAD TRANSIENT RESPONSE
– Output Voltage Deviation – V
V
O
∆
DESIGN CONSIDERATIONS
The internal reference (see functional block diagram) generates 1.25 V nominal (V
ref
) between OUT and ADJ. This
voltage is developed across R1 and causes a constant current to flow through R1 and the programming resistor R2,
giving an output voltage of:
V
O =
V
ref
(1 + R2/R1) + l
I(ADJ)
(R2)
or
V
O
≈ V
ref
(1 + R2/R1)
The TL783 was designed to minimize the input current at ADJ and maintain consistency over line and load variations,
thereby minimizing the associated (R2) error term.
To maintain I
I(ADJ)
at a low level, all quiescent operating current is returned to the output terminal. This quiescent
current must be sunk by the external load and is the minimum load current necessary to prevent the output from rising.
The recommended R1 value of 82 Ω provides a minimum load current of 15 mA. Larger values can be used when
the input-to-output differential voltage is less than 125 V (see output-current curve, Figure 14) or when the load sinks
some portion of the minimum current.