Datasheet

TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS

SLVS028I − APRIL 1983 − REVISED JULY 2009
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
†
Figure 2
30
26
22
18
0246
34
38
ASSERTION TIME
vs
LOAD RESISTANCE
42
810
t − Assertion Time − ns
R
L
− Load Resistance − kΩ
RESET t
r
RESET t
f
V
CC
= 5 V
C
T
= 0.1 µF
C
L
= 10 pF
T
A
= 25°C
Figure 3
4
3
2
1
0246
t − Deassertion Time −
5
6
DEASSERTION TIME
vs
LOAD RESISTANCE
7
810
0
sµ
R
L
− Load Resistance − kΩ
RESET t
f
RESET t
r
V
CC
= 5 V
C
T
= 0.1 µF
C
L
= 10 pF
T
A
= 25°C
Figure 4
32
28
24
20
0 25 50 75 100 125
36
40
ASSERTION TIME
vs
LOAD CAPACITANCE
44
150 175 200
RESET t
r
RESET t
f
V
CC
= 5 V
C
T
= 0.1 µF
R
L
= 4.7 kΩ
T
A
= 25°C
t − Assertion Time − ns
C
L
− Load Capacitance − pF
Figure 5
2.4
2
1.6
1.2
2.8
3.2
DEASSERTION TIME
vs
LOAD CAPACITANCE
3.6
RESET t
f
RESET t
r
V
CC
= 5 V
C
T
= 0.1 µF
R
L
= 4.7 kΩ
T
A
= 25°C
0 25 50 75 100 125 150 175 200
C
L
− Load Capacitance − pF
0.8
t − Deassertion Time − sµ
†
For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.