Datasheet

t
po
t
po
RESET
V
hys
V
CC
1.5 V
T
T
V
s’
TL7700
www.ti.com SLVS220F – JULY 1999–REVISED AUGUST 2011
A. The sense voltage, V
s'
, is different from the SENSE terminal input voltage, V
s
. V
s
normally is 500 mV for triggering.
Figure 20. V
CC
-RESET Timing Chart
Output Pulse-Duration Setting
Constant-current charging starts on the timing capacitor when the sensing-line voltage reaches the TL7700
sense voltage. When the capacitor voltage exceeds the threshold level of the output drive comparator, RESET
changes from a low to a high level. The output pulse duration is the time between the point when the sense-pin
voltage exceeds the threshold level and the point when the RESET output changes from a low level to a high
level. When the TL7700 is used for system power-on reset, the output pulse duration, t
po
, must be set longer
than the power rise time. The value of t
po
is:
t
po
= C
t
× 10
5
seconds
Where:
C
t
is the timing capacitor in farads
There is a limit on the device response speed. Even if C
t
= 0, t
po
is not 0, but approximately 5 μs to 10 μs.
Therefore, when the TL7700 is used as a comparator with hysteresis without connecting C
t
, switching speeds
(t
r
/t
f
, t
po
/t
pd
, etc.) must be considered.
Copyright © 1999–2011, Texas Instruments Incorporated 11