Datasheet
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APPLICATION INFORMATION
1
2
3
4
8
7
6
5
TL7660
+
-
+
-
C
10 µF
1
C
10 µF
2
–V
OUT
V+
(5 V)
I
S
I
L
R
L
C
OSC
(see
Note A)
8
3
2
5
3
7
V = –V
OUT IN
S
2
S
1
S
3
S
4
C
2
V
IN
C
1
TL7660
CMOS VOLTAGE CONVERTER
SCAS794 – JUNE 2006
A. In the circuit, there is no external capacitor applied to terminal 7. However when device is plugged into a test
socket,there is usually a very small but finite stray capacitance present on the order of 10 pF.
Figure 1. Test Circuit
The TL7660 contains all the necessary circuitry to complete a negative voltage converter, with the exception of
two external capacitors which may be inexpensive 10 µ F polarized electrolytic types. The mode of operation of
the device may be best understood by considering Figure 2 , which shows an idealized negative voltage
converter. Capacitor C
1
is charged to a voltage, V
CC
, for the half cycle when switches S
1
and S
3
are closed.
(Note: Switches S
2
and S
4
are open during this half cycle.) During the second half cycle of operation, switches
S
2
and S
4
are closed, with S
1
and S
3
open, thereby shifting capacitor C
1
negatively by V
CC
volts. Charge is then
transferred from C
1
to C
2
such that the voltage on C
2
is exactly V
CC
, assuming ideal switches and no load on C
2
.
The TL7660 approaches this ideal situation more closely than existing non-mechanical circuits. In the TL7660,
the four switches of Figure 2 are MOS power switches: S
1
is a p-channel device, and S
2
, S
3
, and S
4
are
n-channel devices. The main difficulty with this design is that in integrating the switches, the substrates of S
3
and S
4
must always remain reverse biased with respect to their sources, but not so much as to degrade their
ON resistances. In addition, at circuit start up and under output short circuit conditions (V
OUT
= V
CC
), the output
voltage must be sensed and the substrate bias adjusted accordingly. Failure to accomplish this results in high
power losses and probable device latchup. This problem is eliminated in the TL7660 by a logic network which
senses the output voltage (V
OUT
) together with the level translators and switches the substrates of S
3
and S
4
to
the correct level to maintain necessary reverse bias.
The voltage regulator portion of the TL7660 is an integral part of the anti-latchup circuitry; however, its inherent
voltage drop can degrade operation at low voltages. Therefore, to improve low-voltage operation, the LV
terminal should be connected to GND, disabling the regulator. For supply voltages greater than 3.5 V, the LV
terminal must be left open to insure latchup proof operation and prevent device damage.
Figure 2. Idealized Negative-Voltage Converter
7
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