Datasheet

DETAILED DESCRIPTION
VOLTAGE REFERENCE
ERROR AMPLIFIER
To PWM
Comparator
V
ref
= 1 V
4
V
I(FB)
3
+
−
R2
R1
COMP
FB
Compensation
Network
TL5001/A
GND
8
OSCILLATOR/PWM
DEAD-TIME CONTROL (DTC)
R
DT
+
(
R
t
) 1250
) [
D
(
V
osc
max * V
osc
min
)
) V
osc
min
]
V
RT
; V
RT
+ 1 V
(1)
TL5001A-Q1
www.ti.com .............................................................................................................................................. SLVS603B – AUGUST 2005 – REVISED FEBRUARY 2009
A 2.5-V regulator operating from V
CC
is used to power the internal circuitry of the TL5001A and as a reference for
the error amplifier and SCP circuits. A resistive divider provides a 1-V reference for the error amplifier
noninverting input which typically is within 2% of nominal over the operating temperature range.
The error amplifier compares a sample of the dc-to-dc converter output voltage to the 1-V reference and
generates an error signal for the PWM comparator. The dc-to-dc converter output voltage is set by selecting the
error-amplifier gain (see Figure 1 ), using the following expression:
V
O
= (1 + R1/R2) (1 V)
Figure 1. Error-Amplifier Gain Setting
The error-amplifier output is brought out as COMP for use in compensating the dc-to-dc converter control loop for
stability. Because the amplifier can only source 45 µ A, the total dc-load resistance should be 100 k Ω or more.
The oscillator frequency (f
osc
) can be set between 20 kHz and 500 kHz by connecting a resistor between RT and
GND. Acceptable resistor values range from 15 k Ω to 250 k Ω . The oscillator frequency can be determined by
using the graph shown in Figure 5 .
The oscillator output is a triangular wave with a minimum value of approximately 0.7 V and a maximum value of
approximately 1.3 V. The PWM comparator compares the error-amplifier output voltage and the DTC input
voltage to the triangular wave and turns the output transistor off whenever the triangular wave is greater than the
lesser of the two inputs.
DTC provides a means of limiting the output-switch duty cycle to a value less than 100%, which is critical for
boost and flyback converters. A current source generates a reference current (I
DT
) at DTC that is nominally equal
to the current at the oscillator timing terminal (RT). Connecting a resistor between DTC and GND generates a
dead-time reference voltage (V
DT
), which the PWM/DTC comparator compares to the oscillator triangle wave as
described in the previous section. Nominally, the maximum duty cycle is 0% when VDT is 0.7 V or less and
100% when V
DT
is 1.3 V or greater. Because the triangle wave amplitude is a function of frequency and the
source impedance of RT is relatively high (1250 Ω ), choosing R
DT
for a specific maximum duty cycle (D) is
accomplished using the following equation and the voltage limits for the frequency in question as found in
Figure 11 (V
osc
max and V
osc
min are the maximum and minimum oscillator levels):
Where
R
DT
and R
t
are in Ω , D is in decimal
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