Datasheet

TL16CP754C, TL16C754C

SLLS644G –DECEMBER 2007– REVISED MAY 2011

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The '754C is available in a 64-pin TQFP PM package. RXRDY and TXRDY functionality is not supported in the

TL16C754CPM device.

TERMINAL FUNCTIONS

TERMINAL

I/O DESCRIPTION

NAME NO.

Address bit 0 select. Internal registers address selection. Refer to Table 9 for Register Address

A0 24 I

Map.

Address bit 1 select. Internal registers address selection. Refer to Table 9 for Register Address

A1 23 I

Map.

Address bit 2 select. Internal registers address selection. Refer to Table 9 for Register Address

A2 22 I

Map.

Carrier detect (active low). These inputs are associated with individual UART channels A

CDA, CDB, 64, 18,

I through D. A low on these pins indicates that a carrier has been detected by the modem for that

CDC, CDD 31, 49

channel.

Clock select. CLKSEL selects the divide-by-1 or divide-by-4 prescalable clock. During the reset,

a logic 1 (V

) on CLKSEL selects the divide-by-1 prescaler. A logic 0 (GND) on CLKSEL

selects the divide-by-4 prescaler. The value of CLKSEL is latched into MCR[7] at the trailing

CLKSEL 21 I

edge of RESET. A logic 1 (V

) on CLKSEL will latch a 0 into MCR[7]. A logic 0 (GND) on

CLKSEL will latch a 1 into MCR[7]. MCR[7] can be changed after RESET to alter the prescaler

value.

Chip select A, B, C, and D (active low). These pins enable data transfers between the user

CSA, CSB, 7, 11,

I CPU and the '754C for the channel(s) addressed. Individual UART sections (A, B, C, D) are

CSC, CSD 38, 42

addressed by providing a low on the respective CSA through CSD pin.

Clear to send (active low). These inputs are associated with individual UART channels A

through D. A low on the CTS pins indicates the modem or data set is ready to accept transmit

CTSA, CTSB, 2, 16,

I data from the '754C. Status can be checked by reading MSR[4]. These pins only affect the

CTSC, CTSD 33, 47

transmit and receive operations when auto CTS function is enabled through the enhanced

feature register (EFR[7]), for hardware flow control operation.