Datasheet
RESET
DTRB
DTRA
RTSA
OPA
RXRDYA
INTA
INTB
A0
A1
A2
N.C.
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
D5
D6
D7
RXB
RXA
TXRDYB
TXA
TXB
OPB
CSA
CSB
N.C.
RA
CDA
DSRA
CTSA
47 46 45 44 4348 42
D4
D3
D2
D1
D0
TXRDYA
RTSB
CTSB
N.C.
IOW
CDB
GND
IOR
DSRB
RIB
39
40
3841
24
37
13
14
15 16
17
18 19 20
21 22
23
XTAL1
N.C.
V
CC
XTAL2
RXRDYB
TL16C752CPFB
TL16C752C
SLLS646A –MARCH 2008–REVISED AUGUST 2009 ....................................................................................................................................................
www.ti.com
Each UART transmits data sent to it from the peripheral 8-bit bus on the TX signal and receives characters on
the RX signal. Characters can be programmed to be 5, 6, 7, or 8 bits. The UART has a 64-byte receive FIFO and
transmit FIFO and can be programmed to interrupt at different trigger levels. The UART generates its own
desired baud rate based upon a programmable divisor and its input clock. It can transmit even, odd, or no parity
and 1-, 1.5-, or 2-stop bits. The receiver can detect break, idle or framing errors, FIFO overflow, and parity errors.
The transmitter can detect FIFO underflow. The UART also contains a software interface for modem control
operations, and software flow control and hardware flow control capabilities.
The TL16C752C is available in a 32-pin QFN (RHB) package. A 48-pin QFP (PFB) package will be available in
late 2008.
PFB PACKAGE
(TOP VIEW)
N.C. – No internal connection
2 Submit Documentation Feedback Copyright © 2008–2009, Texas Instruments Incorporated
Product Folder Link(s): TL16C752C