Datasheet

Start
Bit
Parity
Bit
Stop
Bit
Next
Data
Start
Bit
Data Bits (5−8)
t
d10
t
d11
RX (A−B)
INT (A−B)
IOR
D0 D1 D2 D3 D4 D5 D6 D7
Active
Active
6 Data Bits
7 Data Bits
16 Baud Rate Clock
5 Data Bits
Active
Active Active Active
Active Active Active
Change of State Change of State
t
d7
t
d8
t
d8
t
d9
t
d8
IOW
RTS (A−B)
DTR
(A−B)
CD
(A−B)
CTS
(A−B)
DSR
(A−B)
INT (A−B)
IOR
RI (A−B) Change of State
Change of State
TL16C752B-EP
SGLS153B –FEBRUARY 2003–REVISED DECEMBER 2007 www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 14. Modem Input/Output Timing
Figure 15. Receive Timing
20 Submit Documentation Feedback Copyright © 2003–2007, Texas Instruments Incorporated
Product Folder Links: TL16C752B-EP