Datasheet

TL16C752B-EP

SGLS153B –FEBRUARY 2003–REVISED DECEMBER 2007

www.ti.com

DESCRIPTION/ORDERING INFORMATION

The TL16C752B is a dual-universal asynchronous receiver/transmitter (UART) with 64-byte FIFOs, automatic

hardware/software flow control, and data rates up to 3 Mbps. The TL16C752B offers enhanced features. It has a

transmission control register (TCR) that stores receiver FIFO threshold levels to start/stop transmission during

hardware and software flow control. With the FIFO RDY register, the software gets the status of TXRDY/RXRDY

for all four ports in one access. On-chip status registers provide the user with error indications, operational

status, and modem interface control. System interrupts may be tailored to meet user requirements. An internal

loopback capability allows onboard diagnostics.The UART transmits data, sent to it over the peripheral 8-bit bus,

on the TX signal and receives characters on the RX signal. Characters can be programmed to be 5, 6, 7, or 8

bits. The UART has a 64-byte receive FIFO and transmit FIFO and can be programmed to interrupt at different

trigger levels. The UART generates its own desired baud rate based upon a programmable divisor and its input

clock. It can transmit even, odd, or no parity and 1, 1.5, or 2 stop bits. The receiver can detect break, idle, or

framing errors, FIFO overflow, and parity errors. The transmitter can detect FIFO underflow. The UART also

contains a software interface for modem control operations, and has software flow control and hardware flow

control capabilities.

The TL16C752B is available in a 48-pin PT (LQFP) package.

ORDERING INFORMATION

(1)

PACKAGE

(2)

–40°C to 105°C TL16C752BTPTREP

–55°C to 110°C TL16C752BLPTREP

(1) For the most current package and ordering information, see the

Package Option Addendum at the end of this document, or see the

TI Web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at

www.ti.com/packaging.

Product Folder Links: TL16C752B-EP