Datasheet

TL16C752B-EP

SGLS153B –FEBRUARY 2003–REVISED DECEMBER 2007

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Reset

Table 2 summarizes the state of registers after reset.

Table 2. Register Reset Functions

(1)

RESET

CONTROL

Interrupt enable register RESET All bits cleared

Interrupt identification register RESET Bits 0 is set. All other bits cleared.

FIFO control register RESET All bits cleared

Line control register RESET Reset to 00011101 (1D hex).

Modem control register RESET All bits cleared

Line status register RESET Bits 5 and 6 set. All other bits cleared

Modem status register RESET Bits 0–3 cleared. Bits 4 –7 input signals.

Enhanced feature register RESET All bits cleared

Receiver holding register RESET Pointer logic cleared

Transmitter holding register RESET Pointer logic cleared

Transmission control register RESET All bits cleared

Trigger level register RESET All bits cleared

(1) Registers DLL, DLH, SPR, Xon1, Xon2, Xoff1, Xoff2 are not reset by the top-level reset signal RESET,

i.e., they hold their initialization values during reset.

Table 3 summarizes the state of registers after reset.

Table 3. Signal Reset Functions

RESET

SIGNAL RESET STATE

CONTROL

TX RESET High

RTS RESET High

DTR RESET High

RXRDY RESET High

TXRDY RESET Low

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