Datasheet
TL16C752B
SLLS405C –DECEMBER 1999–REVISED JUNE 2010
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THERMAL INFORMATION
TL16C752B
THERMAL METRIC
(1)
PT UNITS
48 PINS
q
JA
Junction-to-ambient thermal resistance
(2)
66.2
q
JCtop
Junction-to-case (top) thermal resistance
(3)
17.6
q
JB
Junction-to-board thermal resistance
(4)
38.6
°C/W
y
JT
Junction-to-top characterization parameter
(5)
0.3
y
JB
Junction-to-board characterization parameter
(6)
34.9
q
JCbot
Junction-to-case (bottom) thermal resistance n/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, y
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining q
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, y
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining q
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
SPACER
REVISION HISTORY
Changes from Original (December 1999) to Revision A Page
• Changed FEATURE bullet From: Up to 2.5 Mbps Baud Rate When Using Oscillator or Clock Source (36-MHz Input
Clock) To: Up to 3 Mbps Baud Rate When Using Oscillator or Clock Source (48-MHz Input Clock) .................................. 1
• Changed DESCRIPTION text From: "and data rates up to 3.125 Mbps" To: "and data rates up to 3 Mbps" ..................... 2
• Changed the IOW pin description - From: "A high to low transition" To: "A low to high transtion" ...................................... 3
• Changed TX section text From: Xon1/2 characters are transmitted when the RX FIFO reaches the trigger level
programmed in TCR[7:4]. To: Xon1/2 characters are transmitted when the RX FIFO reaches the RESUME trigger
level programmed in TCR[7:4]. ............................................................................................................................................. 8
• Added th esecond paragraph to the NOTE in the Line Status Register (LSR) section ...................................................... 27
• Updated the description of BIT 3 in Table 12 ..................................................................................................................... 28
• Updated the description of BITs 4 and 5 in Table 13 ......................................................................................................... 28
• Updated Table 20 ............................................................................................................................................................... 32
Changes from Revision A (August 2000) to Revision B Page
• Added table - Typical Package Thermal Resistance Data ................................................................................................. 34
• Added table - Typical Package Weight ............................................................................................................................... 34
Changes from Revision B (Novenber 2006) to Revision C Page
• Deleted table - Typical Package Thermal Resistance Data and table - Typical Package Weight ..................................... 34
• Added table - Thermal Information ..................................................................................................................................... 34
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