Datasheet

TL16C752B

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SLLS405C –DECEMBER 1999–REVISED JUNE 2010

Transmission Control Register (TCR)

This 8-bit register is used to store the receive FIFO threshold levels to start/stop transmission during

hardware/software flow control. Table 18 shows transmission control register bit settings.

Table 18. Transmission Control Register (TCR) Bit Settings

BIT NO. BIT SETTINGS

(1)

3:0 RCV FIFO trigger level to halt transmission (0–60)

7:4 RCV FIFO trigger level to resume transmission (0–60)

(1) IER[7:4] can only be modified if EFR[4] is set, i.e., EFR[4] is a write enable. Re-enabling IER[1] will not

cause a new interrupt if the THR is below the threshold.

TCR trigger levels are available from 0-60 bytes with a granularity of four.

NOTE

TCR can only be written to when EFR[4] = 1 and MCR[6] = 1. The programmer must

program the TCR such that TCR[3:0] > TCR[7:4]. There is no built-in hardware check to

make sure this condition is met. Also, the TCR must be programmed with this condition

before Auto-RTS or software flow control is enabled to avoid spurious operation of the

device.

Trigger Level Register (TLR)

This 8-bit register is pulsed to store the transmit and received FIFO trigger levels used for DMA and interrupt

generation. Trigger levels from 4-60 can be programmed with a granularity of 4. Table 19 shows trigger level

Table 19. Trigger Level Register (TLR) Bit Settings

BIT NO. BIT SETTINGS

(1)

3:0 Transmit FIFO trigger levels (4–60), number of spaces available

7:4 RCV FIFO trigger levels (4–60), number of characters available

(1) IER[7:4] can only be modified if EFR[4] is set, i.e., EFR[4] is a write enable. Re-enabling IER[1] will not

cause a new interrupt if the THR is below the threshold.

SPACER

NOTE

TLR can only be written to when EFR[4] = 1 and MCR[6] = 1. If TLR[3:0] or TLR[7:4] are

0, the selectable trigger levels via the FIFO control register (FCR) are used for the

transmit and receive FIFO trigger levels. Trigger levels from 4-60 bytes are available with

a granularity of four. The TLR should be programmed for N/4, where N is the desired

trigger level.

When the trigger level setting in TLR is zero, TL16C752B uses the trigger level setting defined in FCR. If TLR

has nonzero trigger level value, the trigger level defined in FCR is discarded. This applies to both transmit FIFO

and receive FIFO trigger level setting.

Product Folder Link(s): TL16C752B