Datasheet

TL16C752B
SLLS405C –DECEMBER 1999–REVISED JUNE 2010 www.ti.com
Table 5. Baud Rates Using a 1.8432-MHz Crystal
DIVISOR USED PERCENT ERROR
DESIRED
TO GENERATE DIFFERENCE BETWEEN
BAUD RATE
16 × CLOCK DESIRED AND ACTUAL
50 2304
75 1536
110 1047 0.026
134.5 857 0.058
150 768
300 384
600 192
1200 96
1800 64
2000 58 0.69
2400 48
3600 32
4800 24
7200 16
9600 12
19200 6
38400 3
5600 2 2.86
Table 6. Baud Rates Using a 3.072-MHz Crystal
DIVISOR USED PERCENT ERROR
DESIRED
TO GENERATE DIFFERENCE BETWEEN
BAUD RATE
16 × CLOCK DESIRED AND ACTUAL
50 3840
75 2560
110 1745 0.026
134.5 1428 0.034
150 1280
300 640
600 320
1200 160
1800 107 0.312
2000 96
2400 80
3600 53 0.628
4800 40
7200 27 1.23
9600 20
19200 10
38400 5
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