Datasheet

F
1, when MC
prescaler
4, when MCR[7] is set to 1 after reset (divide-by-4 clock selected)
R divisor = (XTAL1 crystal input frequency/prescaler) / (desired baud rate × 16)
Where:
=
{
R[7] is set to 0 after reset (divide-by-1 clock selected)
XTAL1
XTAL2
MCR[7]=0
MCR[7]=1
InputClock
Internal
Oscillator
Logic
PrescalerLogic
(DivideBy1)
PrescalerLogic
(DivideBy4)
Reference
Clock
BaudRate
Generator
Logic
Internal
BaudRate
Clock
for Transmitter
andReceiver
B0422-01
TL16C752B
www.ti.com SLLS405C –DECEMBER 1999–REVISED JUNE 2010
Programmable Baud Rate Generator
The TL16C752B UART contains a programmable baud generator that takes any clock input and divides it by a
divisor in the range between 1 and (2
16
–1). An additional divide-by-4 prescaler is also available and can be
selected by MCR[7], as shown in Figure 9. The output frequency of the baud rate generator is 16x the baud rate.
The formula for the divisor is:
NOTE
The default value of prescaler after reset is divide-by-1.7
Figure 9 shows the internal prescaler and baud rate generator circuitry.
Figure 9. Prescaler and Baud Rate Generator Block Diagram
DLL and DLH must be written to in order to program the baud rate. DLL and DLH are the least significant and
most significant byte of the baud rate divisor. If DLL and DLH value are both zero, the UART is effectively
disabled, as no baud clock will be generated.
NOTE
The programmable baud rate generator is provided to select both the transmit and receive
clock rates.
Table 5 and Table 6 show the baud rate and divisor correlation for crystal with frequency 1.8432 MHz and 3.072
MHz respectively.
Figure 10 shows the crystal clock circuit reference.
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