Datasheet

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SLLS165G − JANUARY 1994 − REVISED MARCH 2006
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
programmable baud rate generator (continued)
Table 10. Baud Rates Using an 8-MHz Clock
BAUD RATE
DESIRED
DIVISOR (N) USED TO
GENERATE 16× CLOCK
PERCENT ERROR DIFFERENCE
BETWEEN DESIRED AND ACTUAL
50 10000 —
75 6667 0.005
110 4545 0.010
134.5 3717 0.013
150 333 0.010
300 1667 0.020
600 883 0.040
1200 417 0.080
1800 277 0.080
2000 250 —
2400 208 0.160
3600 139 0.080
4800 104 0.160
7200 69 0.644
9600 52 0.160
19200 26 0.160
38400 13 0.160
56000 9 0.790
128000 4 2.344
256000 2 2.344
512000 1 2.400