Datasheet

TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
IOR
(RD_LPS)
Line Printer
Status Register,
Bit 2 (PRINT)
t
d13
t
d(int
(see Note A)
ACK
ENIRQ
INT2
t
d14
50%
50%
50%50%
50%
50%
NOTE A: A timing value is not provided for t
d(int)
in the tables because the line printer status register, bit 2 (PRINT
) is an internal signal.
Figure 16. Parallel Port AT Mode Timing (ENIRQ = Low) Waveforms
IOR
(RD_LPS)
PRINT
t
d15
t
d16
ACK
ENIRQ
INT2
50%
50%
50%
50%
Figure 17. Parallel Port PS/2 Mode Timing (ENIRQ = High) Waveforms
RESET
t
w3
50%50%
Figure 18. RESET Voltage Waveform