Datasheet

TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Valid
Valid
t
h3
t
su4
t
su5
t
h4
t
d3
t
d4
t
w5
A2,
A1,
A0
CS0, CS1, CS2
IOW
IOR
Active
Active
t
h5
t
su6
Valid Data
Active
DB0DB7
50% 50%
50% 50%
50% 50%
50%
50%
or
Figure 5. Write Cycle Timing Waveforms
Start
Data Bits 58
Parity
Stop (1–2)
Start
Serial Out
(SOUT)
Interrupt
(THRE)
IOW
(WR THR)
IOR
(RD IIR)
t
d5
t
d6
t
pd2
t
pd4
t
pd2
t
d7
50%
50%
50% 50% 50%
50%
50%
50%
50%50%
50%
Figure 6. Transmitter Timing Waveforms
IOW
(WR THR)
t
d8
t
pd5
SOUT
TXRDY
Byte #1
ParityData Stop
Start
50%
50%
50%
50%
Figure 7. Transmitter Ready Mode 0 Timing Waveforms