Datasheet

TYPICAL CRYSTAL OSCILLATOR NETWORK
CRYSTAL
3.072 MHz
1 MΩ 1.5 kΩ 10 – 30 pF 40 – 60 pF
1.8432 MHz
1 MΩ 1.5 kΩ 10 – 30 pF 40 – 60 pF
16 MHz
1 MΩ
0 Ω
33 pF
33 pF
R
p
RX2 C1 C2
Receiver Buffer Register (RBR)
TL16C550D , , TL16C550DI
SLLS597E – APRIL 2004 – REVISED DECEMBER 2008 .................................................................................................................................................. www.ti.com
Table 10. Baud Rates Using a 3.072-MHz
Crystal (continued)
DIVISOR USED PERCENT ERROR
DESIRED
TO GENERATE DIFFERENCE BETWEEN
BAUD RATE
16 × CLOCK DESIRED AND ACTUAL
1800 107 0.312
2000 96
2400 80
3600 53 0.628
4800 40
7200 27 1.23
9600 20
19200 10
38400 5
Figure 27. Typical Clock Circuits
The ACE receiver section consists of a receiver shift register (RSR) and a RBR. The RBR is actually a 16-byte
FIFO. Timing is supplied by the 16 ＝ receiver clock (RCLK). Receiver section control is a function of the ACE
line control register.
The ACE RSR receives serial data from SIN. The RSR then concatenates the data and moves it into the RBR
FIFO. In the TL16C450 mode, when a character is placed in the RBR and the received data available interrupt is
enabled (IER0 = 1), an interrupt is generated. This interrupt is cleared when the data is read out of the RBR. In
the FIFO mode, the interrupts are generated based on the control setup in the FIFO control register.
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