Datasheet

SYSTEM SWITCHING CHARACTERISTICS
(1)
BAUD GENERATOR SWITCHING CHARACTERISTICS
RECEIVER SWITCHING CHARACTERISTICS
(1)
TRANSMITTER SWITCHING CHARACTERISTICS
(1)
TL16C550D , , TL16C550DI
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.................................................................................................................................................. SLLS597E APRIL 2004 REVISED DECEMBER 2008
over recommended ranges of supply voltage and operating free-air temperature
PARAMETER ALT. SYMBOL TEST CONDITIONS MIN MAX UNIT
t
dis(R)
Disable time, RD1 or RD2 to DDIS t
RDD
C
L
= 75 pF, Figure 7 20 ns
(1) Charge and discharge are determined by V
OL
, V
OH
, and external loading.
over recommended ranges of supply voltage and operating free-air temperature, C
L
= 75 pF (For PT and PFB packages only)
PARAMETER ALT. SYMBOL TEST CONDITIONS MIN MAX UNIT
t
w3
Pulse duration, BADOUT low t
LW
f = 24 MHz, CLK ÷ 2, V
CC
= 5 V,
35 ns
See Figure 5
t
w4
Pulse duration, BADOUT high t
HW
t
d1
Delay time, XIN to BADOUT t
BLD
See Figure 5 45 ns
t
d2
Delay time, XIN to BADOUT t
BHD
See Figure 5 45 ns
over recommended ranges of supply voltage and operating free-air temperature
PARAMETER ALT. SYMBOL TEST CONDITIONS MIN MAX UNIT
t
d12
Delay time, RCLK to sample t
SCD
See Figure 8 10 ns
See Figure 5 , Figure 9 , RCL
Delay time, stop to set INTRPT or read
t
d13
t
SINT
Figure 10 , Figure 11 , 1 K
RBR to lSI interrupt or stop to RXRDY
Figure 12 cycle
C
L
= 75 pF,
See Figure 5 , Figure 9 ,
t
d14
Delay time, read RBR/LSR to reset INTRPT t
RINT
70 ns
Figure 10 , Figure 11 ,
Figure 12
(1) In the FIFO mode, the read cycle (RC) = 425 ns (min) between reads of the receive FIFO and the status registers (interrupt identification
register or line status register).
over recommended ranges of supply voltage and operating free-air temperature
PARAMETER ALT. SYMBOL TEST CONDITIONS MIN MAX UNIT
baudout
t
d15
Delay time, initial write to transmit start t
IRS
See Figure 13 8 24
cycles
baudout
t
d16
Delay time, start to INTRPT t
STI
See Figure 13 8 10
cycles
C
L
= 75 pF,
t
d17
Delay time, WR1 (WR THR) to reset INTRPT t
HR
50 ns
See Figure 13
baudout
t
d18
Delay time, initial write to INTRPT (THRE
(1)
) t
SI
See Figure 13 16 34
cycles
C
L
= 75 pF,
t
d19
Delay time, read IIR
(2)
to reset INTRPT (THRE
(1)
) t
IR
35 ns
See Figure 13
C
L
= 75 pF,
t
d20
Delay time, write to TXRDY inactive t
WXI
35 ns
See Figure 14 and Figure 15
C
L
= 75 pF, baudout
t
d21
Delay time, start to TXRDY active t
SXA
9
See Figure 14 and Figure 15 cycles
(1) THRE = transmitter holding register empty
(2) IIR = Interrupt identification register
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