Datasheet

 
  
  
SLLS177H − MARCH 1994 − REVISED JANUARY 2006
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
t
d13
Active
Active
RD1
, RD2
(read RBR)
RCLK
t
d14
t
d14
8 CLKs
t
d12
Parity StopStart Data Bits 5−8
Sample Clock
TL16C450 Mode:
Sample Clock
SIN
INTRPT
(data ready)
INTRPT
(RCV error)
RD1
, RD2
(read LSR)
50%50%
50%
50%
50%
50%
Figure 8. Receiver Timing Waveforms