Datasheet
SLLS177H − MARCH 1994 − REVISED JANUARY 2006
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
ALT. SYMBOL FIGURE TEST CONDITIONS MIN MAX UNIT
t
cR
Cycle time, read (t
w7
+ t
d8
+ t
d9
) RC 87 ns
t
cW
Cycle time, write (t
w6
+ t
d5
+ t
d6
) WC 87 ns
t
w1
Pulse duration, clock high t
XH
5
f = 16 MHz Max,
V = 5 V
25
ns
t
w2
Pulse duration, clock low t
XL
5
f = 16 MHz Max,
V
CC
= 5 V
25 ns
t
w5
Pulse duration, ADS low t
ADS
6, 7 9 ns
t
w6
Pulse duration, WR t
WR
6 40 ns
t
w7
Pulse duration, RD t
RD
7 40 ns
t
w8
Pulse duration, MR t
MR
1 µs
t
su1
Setup time, address valid before ADS↑ t
AS
6, 7
8
ns
t
su2
Setup time, CS valid before ADS↑ t
CS
6, 7 8 ns
t
su3
Setup time, data valid before WR1↑ or WR2↓ t
DS
6 15 ns
t
su4
Setup time, CTS↑ before midpoint of stop bit 17 10 ns
t
h1
Hold time, address low after ADS↑ t
AH
6, 7
0
ns
t
h2
Hold time, CS valid after ADS↑ t
CH
6, 7 0 ns
t
h3
Hold time, CS valid after WR1↑ or WR2↓ t
WCS
6
10
ns
t
h4
Hold time, address valid after WR1↑ or WR2↓ t
WA
6 10 ns
t
h5
Hold time, data valid after WR1↑ or WR2↓ t
DH
6 5 ns
t
h6
Hold time, chip select valid after RD1↑ or RD2↓ t
RCS
7 10 ns
t
h7
Hold time, address valid after RD1↑ or RD2↓ t
RA
7 20 ns
t
d4
†
Delay time, CS valid before WR1↓ or WR2↑ t
CSW
6
7
ns
t
d5
†
Delay time, address valid before WR1↓ or WR2↑ t
AW
6 7 ns
t
d6
†
Delay time, write cycle, WR1↑ or WR2↓ to ADS↓ t
WC
6 40 ns
t
d7
†
Delay time, CS valid to RD1↓ or RD2↑ t
CSR
7
7
ns
t
d8
†
Delay time, address valid to RD1↓ or RD2↑ t
AR
7 7 ns
t
d9
Delay time, read cycle, RD1↑ or RD2↓ to ADS↓ tRC 7 40 ns
t
d10
Delay time, RD1↓ or RD2↑ to data valid t
RVD
7 C
L
= 75 pF 45 ns
t
d11
Delay time, RD1↑ or RD2↓ to floating data t
HZ
7 C
L
= 75 pF 20 ns
†
Only applies when ADS
is low
system switching characteristics over recommended ranges of supply voltage and operating
free-air temperature (see Note 7)
PARAMETER ALT. SYMBOL FIGURE TEST CONDITIONS MIN MAX UNIT
t
dis(R)
Disable time, RD1↓↑ or RD2↑↓ to DDIS↑↓ t
RDD
7 C
L
= 75 pF 20 ns
NOTE 7: Charge and discharge times are determined by V
OL
, V
OH
, and external loading.
baud generator switching characteristics over recommended ranges of supply voltage and
operating free-air temperature, C
L
= 75 pF
PARAMETER ALT. SYMBOL FIGURE TEST CONDITIONS MIN MAX UNIT
t
w3
Pulse duration, BAUDOUT low t
LW
5
f = 16 MHz, CLK
÷
2,
V = 5 V
50
ns
t
w4
Pulse duration, BAUDOUT high t
HW
5
f = 16 MHz, CLK ÷ 2,
V
CC
= 5 V
50 ns
t
d1
Delay time, XIN↑ to BAUDOUT↑ t
BLD
5 45 ns
t
d2
Delay time, XIN↑↓ to BAUDOUT↓ t
BHD
5 45 ns