Datasheet

TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
SLLS053C – MAY 1989 – REVISED AUGUST 1999
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
t
cW
Cycle time, write (t
w6
+ t
d5
+ t
d6
) 175 ns
t
w1
Pulse duration, clock↑ 1 50 ns
t
w2
Pulse duration, clock↓ 1 50 ns
t
w5
Pulse duration, write strobe (IOW)↑ 2 80 ns
t
w6
Pulse duration, read strobe (IOR)↓ 3 80 ns
t
wRST
Pulse duration, reset 1000 ns
t
su1
Setup time, address (A0 – A2) valid before IOW↓ 2,3 15 ns
t
su2
Setup time, chip select (CSx) valid before IOW↓ 2,3 15 ns
t
su3
Setup time, data (D0 – D7) valid before IOW↑ 2 15 ns
t
h1
Hold time, address (A0 – A2) valid after IOW↑ 2,3 20 ns
t
h2
Hold time, chip select (CSx) valid after IOW↑ 2,3 20 ns
t
h3
Hold time, data (D0 – D7) valid before IOW↑ 2 15 ns
t
d3
Delay time, write cycle (IOW)↑ to IOW↓ 2 80 ns
t
d4
Delay time, read cycle (IOR)↑ to IOR↓ 3 80 ns
system switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER FIGURE TEST CONDITIONS MIN MAX UNIT
t
d5
Delay time, data (D0 – D7) valid before read (IOR)↑ 3 C
L
= 100 pF 60 ns
t
d6
Delay time, floating data (D0 – D7) valid after read (IOR)↑ 3 C
L
= 100 pF 0 60 ns
t
dis(R)
Read to driver disable, IOR↓ to BD0↓ 3 C
L
= 100 pF 60 ns
receiver switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER FIGURE TEST CONDITIONS MIN MAX UNIT
t
d7
Delay time, RCLK↑ to sample clock↑ 4 100 ns
t
d8
Delay time stop (sample clock)↑ to set interrupt (INTRPT)↑
4
1
1
RCLK
t
d8
D
e
l
ay
ti
me, s
t
op
(
samp
l
e c
l
oc
k)↑
t
o se
t
i
n
t
errup
t
(INTRPT)↑
4
1
1
cycles
t
d9
Delay time, read RBR/LSR (IOR)↑ to reset interrupt (INTRPT)↓ 4 C
L
= 100 pF 140 ns
transmitter switching characteristics over recommended ranges of supply voltage and operating
free-air temperature
PARAMETER FIGURE TEST CONDITIONS MIN MAX UNIT
t
d10
Delay time initial write THR (IOW)↑ to transmit start (SOUT)↓
5
8
24
baudout
t
d10
D
e
l
ay
ti
me,
i
n
iti
a
l
wr
it
e
THR
(IOW)↑
t
o
t
ransm
it
s
t
ar
t
(SOUT)↓
5
8
24
cycles
t
d11
Delay time stop (SOUT) low to interrupt (INTRPT)↑
5
8
8
baudout
t
d11
D
e
l
ay
ti
me, s
t
op
(SOUT)
l
ow
t
o
i
n
t
errup
t
(INTRPT)↑
5
8
8
cycles
t
d12
Delay time, write THR (IOW)↓ to reset interrupt (INTRPT) low 5 C
L
= 100 pF 140 ns
t
d13
Delay time initial write (IOW)↑ to THRE interrupt (INTRPT)↑
5
16
32
baudout
t
d13
D
e
l
ay
ti
me,
i
n
iti
a
l
wr
it
e
(IOW)↑
t
o
THRE
i
n
t
errup
t
(INTRPT)↑
5
16
32
cycles
t
d14
Delay time, read IIR (IOR)↑ to reset THRE interrupt (INTRPT) low 5 C
L
= 100 pF 140 ns
modem control switching characteristics over recommended ranges of supply voltage and
operating free-air temperature
PARAMETER FIGURE TEST CONDITIONS MIN MAX UNIT
t
d15
Delay time, write MCR (IOW)↑ to output (RTS, DTS)↓↑ 6 C
L
= 100 pF 100 ns