Datasheet


  
SLLS037C − MARCH 1988 − REVISED JANUARY 2006
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
XTAL1
CS0
CS1
CS2
ADS
MR
A0−A2
D0−D7
DOSTR
DISTR
XTAL2
BAUDOUT
RCLK
TL16C450
DTR
RTS
OUT1
OUT2
RI
DCD
DSR
CTS
SOUT
SIN
INTRPT
CSOUT
DDIS
NC
DOSTR
DISTR
20
1
8
6
5
2
3
7
1
A16−A23 A16−A23
AD0−
AD7
Buffer
Address
Decoder
CPU
ADS
RSI/ABT
AD0−AD15
PHI2PHI1
PHI2PHI1 RSTOADS
RO
WR
TCU
AD0−AD15
GND
(V
SS)
5 V
(V
CC)
Alternate
Xtal Control
5 V
EIA-232-D
Connector
Figure 9. Typical TL16C450 Connection to a CPU