Datasheet

t
d13
Active
Active
IOR
(read RBR)
RCLK
(Internal)
t
d14
t
d14
t
d12
Parity StopStart Data Bits 5−8
Sample Clock
(Internal)
TL16C450 Mode:
Sample Clock
RXA, RXB
INT
(data ready)
INT
(RCV error)
IOR
(read LSR)
50%50%
50%
50%
50%
50%
8 CLKs
TL16C2550
www.ti.com SLWS161E –JUNE 2005–REVISED NOVEMBER 2012
TYPICAL CHARACTERISTICS (continued)
Figure 13. Receiver Timing Waveforms
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