Datasheet
SLVS423 A− MAY 2002 − REVISED SEPTEMBER 2002
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
error amplifier
R1 and R2 should be tight-tolerance (±1% or better) devices with low and/or matched temperature coefficients
to minimize output voltage errors. A device with a ±5% tolerance is suitable for R3.
_
+
IN−
IN+
R2
COMP
To PWM
V
O
Compensation
Network
REF
R1
R3
Converter
Output
Figure 2. Sense Divider/Error Amplifier Configuration for Converters with Negative Outputs
Figure 2 shows the divider network and error-amplifier configuration for negative output voltages. In general,
the comments for positive output voltages also apply for negative outputs. The output voltage is given by:
V
O
+*
R
1
V
ref
R
2
The design procedure for choosing the resistor value is to select a convenient value for R2 (instead of R3 in
the procedure for positive outputs) and calculate R1 and R3 using:
R
1
+*
R
2
V
O
V
ref
R
3
+
R
1
R
2
R
1
) R
2
Values in the 10-kΩ to 20-kΩ range work well for R2. R3 can be omitted and the noninverting amplifier connected
to ground in applications where the output voltage tolerance is not critical.
oscillator
The oscillator frequency can be set between 50 kHz and 2 MHz with a resistor connected between RT and GND
and a capacitor between CT and GND (see Figure 3). Figure 6 is used to determine R
T
and C
T
for the desired
operating frequency. Both components should be tight-tolerance, temperature-stable devices to minimize
frequency deviation. A 1% metal-film resistor is recommended for R
T
, and a 10%, or better, NPO ceramic
capacitor is recommended for C
T
.
R
T
C
T
RT CT
TL1454A
21
Figure 3. Oscillator Timing