Datasheet
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1RY
15
2RY
13
3RY
11
1DA
14
2DA
12
3DA
10
1RA
2
2RA
4
3RA
6
1DY
3
2DY
5
3DY
7
logic diagram (positive logic)
Typical of Each Receiver
Typical of Each Driver
RA
DY
RY
DA
2, 4, 6
3, 5, 7
15, 13, 11
14, 12, 10
schematic (each driver)
DYx
Output
320 Ω
68.5 Ω3.3 kΩ
10.4 kΩ
To Other Drivers
V
SS
To Other
Drivers
GND
4.2 kΩ
Input
DAx
V
DD
75.8 Ω
9.4 kΩ11.6 kΩ
To Other Drivers
Resistor values shown are nominal.
ESD
ESD
ESD
ESD