Datasheet

MPEG Decoder/
Graphics Processor/
Video Memory
BPb[9:0]
GY[9:0]
RPr[9:0]
CLKIN
HS
VS
THS8200
VS_OUT
HS_OUT
R/Pr
B/Pb
G/Y
Computer Monitor
SDA
SCL
To an NTSC/PAL
Encoder
To an I
2
C
Master Device
D1CLK DO[9:0]
THS8200
SLES032D –JUNE 2002–REVISED JUNE 2013 www.ti.com
Figure 6-4. Master Operation Mode of THS8200
82 Application Information Copyright © 2002–2013, Texas Instruments Incorporated
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