Datasheet

THS8200
SLES032D JUNE 2002REVISED JUNE 2013
www.ti.com
All-Format Oversampled Component Video/PC Graphics D/A System With Three 11-Bit
DACs, CGMS Data Insertion
Check for Samples: THS8200
1 Introduction
1.1 Features
123
Fully Programmable Display Timing
Overall
Generator to Supply All SDTV and HDTV
Three 11-Bit 205-MSPS D/A Converters With
Composite Sync Ttiming Formats,
Integrated Bi-Level/Tri-Level Sync Insertion
Progressive and Interlaced
Support for All ATSC Video Formats
Fully Programmable Hsync/Vsync Outputs
(Including 1080P) and PC Graphics Formats
Vertical Blanking Interval (VBI) Override or
(Up to UXGA at 75 Hz)
Data Pass-Thru for VBI Data Transparency
Input
Programmable CGMS Data Generation and
Flexible 10/15/16/20/24/30-Bit Digital Video
Insertion
Input Interface With Support for YCbCr or
Output
RGB Data, Either 4:4:4 or 4:2:2 Sampled
Digital
Video Synchronization Via Hsync, Vsync
Dedicated Inputs or Via Extraction of ITU-R BT.656 Digital Video Output Port
Embedded SAV/EAV Codes According to
Analog
ITU-R.BT601 (SDTV) or
Analog Component Output from
SMPTE274M/SMPTE296M (HDTV)
Software-Switchable 700-mV/1.3-V
Glueless Interface to TI DVI 1.0 (With HDCP)
Compliant Output DACs at 37.5-Ω load
Receivers. Can Receive Video-Over-DVI
Programmable Video/Sync Ratio (7:3 or
Formats According to the EIA-861
10:4)
Specification and Convert to YPbPr/RGB
Programmable Video Pedestal
Component Formats With Separate Syncs or
General
Embedded Composite Sync
Built-In Video Color Bar Test Pattern
Video processing
Generator
Programmable Clip/Shift/Multiply Function
Fast Mode I
2
C Control Interface
for Operation With Full-Range or ITU-
Configurable Master or Slave Timing Mode
R.BT601 Video Range Input Data
Configuration Modes Allow the Device to
Programmable Digital Fine-Gain Controller
Act as a Master Timing Source for
on Each Analog Output Channel, for
Requesting Data From, For Example, the
Accurate Channel Matching and
Video Frame Buffer (Master Mode Only
Programmable White-Balance Control
Available for PC Graphics Output Modes)
Built-In 4:2:2 to 4:4:4 Video Interpolation
Alternatively, the Device Can Slave to an
Filter
External Timing Master
Built-In 2x Oversampling SDTV/HDTV
DAC and Chip Powerdown Modes
Interpolation Filter for Improved Video
Low-Power 1.8-/3.3-V Operation
Frequency Characteristic
80-Pin PowerPAD™ Plastic Quad Flatpack
Fully Programmable Digital Color Space
Package with Efficient Heat Dissipation and
Conversion Circuit
Small Physical Size
1
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Copyright © 2002–2013, Texas Instruments Incorporated
specifications per the terms of the Texas Instruments standard warranty. Production
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