Datasheet

THS8200
www.ti.com SLES032D –JUNE 2002–REVISED JUNE 2013
dtg1_mode(3:0): DTG mode selection
{dtg1_mode 0x38(3:0)} [0110]
Selects the operation mode of the DTG according to the following table. Each setting is either an SDTV, HDTV or VESA format, as
shown:
dtg1_mode MODE
0000 ATSC mode 1080P (SMPTE 274M progressive) [HDTV]
0001 ATSC mode 1080I (SMPTE274M interlaced) [HDTV]
0010 ATSC mode 720P (SMPTE296M progressive) [HDTV]
0011 Generic mode for HDTV [HDTV]
0100 ATSC mode 480I (SDTV 525 lines interlaced) [SDTV]
0101 ATSC mode 480P (SDTV 525 lines progressive) [SDTV]
0110 VESA master [VESA]
0111 VESA slave [VESA]
1000 SDTV 625 interlaced [SDTV]
1001 Generic mode for SDTV [SDTV]
Others [Null]
dtg1_frame_size(10:0): Generic mode frame size
{dtg1_frame_field_size_msb 0x39(6:4) and [011 0000 0000]
dtg1_framesize_lsb 0x3A(7:0)}
Determines number of lines per frame when in generic mode
dtg1_field_size(10:0): Generic mode field size
{dtg1_frame_field_size_msb 0x39(2:0) and [000 0010 0000]
dtg1_fieldsize_lsb 0x3B(7:0)}
Determines number of lines in field 1 when in generic mode. This number should be programmed higher than frame_size for
progressive scan formats.
dtg1_vesa_cbar_size(7:0): Color bar pattern, width
{dtg1_vesa_cbar_size 0x3C(7:0)} [1000 0000]
Sets the width of each color bar in the color bar test pattern. This test pattern is only available when the DTG is in VESA mode.
5.2.6 DAC Control (Sub-Addresses 0x3D−0x40)
dac_i2c_cntl: DAC I
2
C control
{dac_cntl_msb 0x3D(6)} [0]
0 : DAC normal operation
1 : DAC inputs are fixed to values of <dac_cntl> registers
dac1_cntl(9:0): DAC1 input value
{dac_cntl_msb 0x3D(5:4) and [00 0000 0000]
dac1_cntl_lsb 0x3E(7:0)}
Direct input to G/Y DAC
dac2_cntl(9:0): DAC2 input value
{dac_cntl_msb 0x3D(3:2) and [00 0000 0000]
dac2_cntl_lsb 0x3F(7:0)}
Direct input to B/Cb DAC
dac3_cntl(9:0): DAC3 input value
{dac_cntl_msb 0x3D(1:0) and [00 0000 0000]
dac3_cntl_lsb 0x40(7:0)}
Direct input to R/Cr DAC
Copyright © 2002–2013, Texas Instruments Incorporated 71
I
2
C Registers
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