Datasheet

THS8200
SLES032D –JUNE 2002–REVISED JUNE 2013 www.ti.com
tst_ydelay(1:0): Y delay path control
{tst_cntl2 0x1B(7:6)} [00]
Adjusts the delay of the Y channel during YCbCr modes
tst_fastramp: DAC test control, fast ramp
{tst_cntl2 0x1B(1)} [0]
0 : Normal operation
1 : DAC outputs a ramp at 2x clock rate.
tst_slowramp: DAC test control, slow ramp
{tst_cntl2 0x1B(0)} [0]
0 : Normal operation
1 : DAC outputs a ramp at 2x clock rate divided by 64,000. This mode has a higher priority than the one set by tst_fastramp
5.2.4 Data Path Control (Sub-Address 0x1C)
data_clk656_on: ITU-R.BT656 output clock control
{data_cntl 0x1C(7)} [0]
0 : D1CLKO output off
1 : D1CLKO output on
data_fsadj: Full-scale adjust control
{data_cntl 0x1C(6)} [0]
Selects which full-scale setting to use. See FSADJ<n> terminal description for nominal full-scale adjust resistor values.
0 : Use full-scale setting from resistor connected to FSADJ2 terminal
1 : Use full-scale setting from resistor connected to FSADJ1 terminal
data_ifir12_bypass: Bypass control 4:2:2 to 4:4:4
{data_cntl 0x1C(5)} [0]
0 : Interpolation filters before the CSC are in the data path, enabling 4:2:2 to 4:4:4 conversion internally. This mode should be used
when the input data is in 4:2:2 format
1 : Interpolation filters before the CSC are bypassed. This mode should be used when the input data is in 4:4:4 format.
data_ifir35_bypass: Bypass control 2x interpolation
{data_cntl 0x1C(4)} [0]
0 : interpolation filters after the CSC are in the data path; enabling 1x to 2x interpolation of the video data.
1 : interpolation filters after the CSC are bypassed. This mode should be used when 1x DAC operation is desired.
data_tristate656: ITU-R.BT656 output bus
{data_cntl 0x1C(3)} [0]
0 : the ITU-R.BT656 output bus is active.
1 : the ITU-R.BT656 output bus is in the high-impedance state.
data_dman_cntl(2:0): Data manager control
{data_cntl 0x1C(2:0)} [011]
Selects the format for the input data manager, as follows:
dman_cntl MODE
000 30-bit YCbCr/RGB 4:4:4
001 16-bit RGB 4:4:4
010 15-bit RGB 4:4:4
011 20-bit YCbCr 4:2:2
100 10-bit YCbCr 4:2:2 (ITU mode)
Others (Reserved)
68 Copyright © 2002–2013, Texas Instruments Incorporated
I
2
C Registers
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