Datasheet

THS8200

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SLES032D –JUNE 2002–REVISED JUNE 2013

chip_ms: Chip mode select

{chip_ctl 0x03(1)} [0]

0 : slave mode. Device synchronizes to incoming video sync signals, either embedded in ITU-R.BT656 interface or received from

dedicated timing signals.

1 : master mode. Device requests video data and generates video input timing signals to external (memory) device, according to the

programmed frame/field format. Master mode is only available when the DTG is operating in VESA mode (PC graphics signals).

arst_func_n: Chip software reset

{chip_ctl 0x03(0)} [1]

0 : functional block goes into reset state. I

C registers retain values.

Note: the user needs to issue a software reset after input video is disconnected from the input bus and reconnected (for example after

a video format change), to synchronize the internal display timing generator to the input video source properly.

1 : normal operation

5.2.2 Color Space Conversion Control (Sub-Addresses 0x04−0x19)

Signed magnitude: MSB is sign bit, remaining bits are binary representation of magnitude. This is not a 2s

complement notation.

Magnitude: Binary representation of magnitude.

csc_ric1(5:0): R/Cr input channel – G/Y output channel coefficient, integer part

{csc_r11 0x04(7:2)} [00 0000]

6-bit integer portion of coefficient that is multiplied with R/Cr input, to produce G/Y output (signed magnitude format)

csc_rfc1(9:0): R/Cr input channel – G/Y output channel, fractional part

{csc_r11 0x04(1:0) and [00 0000 0000]

csc_r12 0x05(7:0)}

10-bit fractional portion of coefficient that is multiplied with R/Cr input, to produce G/Y output (magnitude format)

csc_ric2(5:0): R/Cr input channel – B/Cb output channel, integer part

{csc_r21 0x06(7:2)} {csc_r21 0x06(7:2)}

6-bit integer portion of coefficient that is multiplied with R/Cr input, to produce B/Cb output (signed magnitude format)

csc_rfc2(9:0): R/Cr input channel – B/Cb output channel, fractional part

{csc_r21 0x06(1:0) and [00 0000 0000]

csc_r22 0x07(7:0)}

10-bit fractional portion of coefficient that is multiplied with R/Cr input, to produce B/Cb output (magnitude format)

csc_ric3(5:0): R/Cr input channel – R/Cr output channel, integer part

{csc_r31 0x08(7:2)} [000000]

6-bit integer portion of coefficient that is multiplied with R/Cr input, to produce R/Cr output (signed magnitude format)

csc_rfc3(9:0): R/Cr input channel − R/Cr output channel, fractional part

{csc_r31 0x08(1:0) and [00 0000 0000]

csc_r32 0x09(7:0)}

10-bit fractional portion of coefficient that is multiplied with R/Cr input, to produce R/Cr output (magnitude format)

C Registers

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