Datasheet

THS8200
SLES032D –JUNE 2002–REVISED JUNE 2013 www.ti.com
Table 5-1. I
2
C Register Map (continued)
REGISTER SUB-
R/W BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
NAME ADDRESS
dtg2_bp13_
R/W 0x56 Reserved dtg2_bp13(10:8) Reserved dtg2_bp14(10:8)
14_msb
dtg2_bp15_
R/W 0x57 Reserved dtg2_bp15(10:8) Reserved dtg2_bp16(10:8)
16_msb
dtg2_bp1_lsb R/W 0x58 dtg2_bp1(7:0)
dtg2_bp2_lsb R/W 0x59 dtg2_bp2(7:0)
dtg2_bp3_lsb R/W 0x5a dtg2_bp3(7:0)
dtg2_bp4_lsb R/W 0x5b dtg2_bp4(7:0)
dtg2_bp5_lsb R/W 0x5c dtg2_bp5(7:0)
dtg2_bp6_lsb R/W 0x5d dtg2_bp6(7:0)
dtg2_bp7_lsb R/W 0x5e dtg2_bp7(7:0)
dtg2_bp8_lsb R/W 0x5f dtg2_bp8(7:0)
dtg2_bp9_lsb R/W 0x60 dtg2_bp9(7:0)
dtg2_bp10_ lsb R/W 0x61 dtg2_bp10(7:0)
dtg2_bp11_ lsb R/W 0x62 dtg2_bp11(7:0)
dtg2_bp12_ lsb R/W 0x63 dtg2_bp12(7:0)
dtg2_bp13_ lsb R/W 0x64 dtg2_bp13(7:0)
dtg2_bp14_ lsb R/W 0x65 dtg2_bp14(7:0)
dtg2_bp15_ lsb R/W 0x66 dtg2_bp15(7:0)
dtg2_bp16_ lsb R/W 0x67 dtg2_bp16(7:0)
dtg2_ linetype1 R/W 0x68 dtg2_linetype1(3:0) dtg2_linetype2(3:0)
dtg2_ linetype2 R/W 0x69 dtg2_linetype3(3:0) dtg2_linetype4(3:0)
dtg2_ linetype3 R/W 0x6a dtg2_linetype5(3:0) dtg2_linetype6(3:0)
dtg2_ linetype4 R/W 0x6b dtg2_linetype7(3:0) dtg2_linetype8(3:0)
dtg2_ linetype5 R/W 0x6c dtg2_linetype9(3:0) dtg2_linetype10(3:0)
dtg2_ linetype6 R/W 0x6d dtg2_linetype11(3:0) dtg2_linetype12(3:0)
dtg2_ linetype7 R/W 0x6e dtg2_linetype13(3:0) dtg2_linetype14(3:0)
dtg2_ linetype8 R/W 0x6f dtg2_linetype15(3:0) dtg2_linetype16(3:0)
dtg2_hlength_
R/W 0x70 dtg2_hlength(7:0)
lsb
dtg2_
hlength_msb_ R/W 0x71 dtg2_hlength(9:8) Reserved dtg2_hdly(12:8)
hdly_msb
dtg2_hdly_lsb R/W 0x72 dtg2_hdly(7:0)
dtg2_
R/W 0x73 dtg2_vlength1(7:0)
vlength1_lsb
dtg2_
vlength1_msb_ R/W 0x74 dtg2_vlength1(9:8) Reserved Reserved Reserved dtg2_vdly1(10:8)
vdly1_msb
dtg2_vdly1_lsb R/W 0x75 dtg2_vdly1(7:0)
dtg2_vlength2_
R/W 0x76 dtg2_vlength2(7:0)
lsb
dtg2_
vlength2_msb_ R/W 0x77 dtg2_vlength2(9:8) Reserved Reserved Reserved dtg2_vlength2(9:8)
vdly2_msb
dtg2_vdly2_lsb R/W 0x78 dtg2_vdly2(7:0)
dtg2_hs_
R/W 0x79 Reserved Reserved Reserved dtg2_hs_in_dly(12:8)
in_dly_msb
dtg2_hs_
R/W 0x7a dtg2_hs_in_dly(7:0)
in_dly_lsb
62 Copyright © 2002–2013, Texas Instruments Incorporated
I
2
C Registers
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