Datasheet

ifir
ifir
dly
eav
sav
scl_en
scl_out
scl_in
sda_en
sda_out
sda_in
rcr_in
bcb_in
gy_in
vs_in
hs_in
databus_in
databus_out
address
addr_en
ready
dg_bias
dr_bias
db_bias
digbypass
Three Channel DACs
4:2:2 to 4:4:4
Data M anag er
I2C
Slave
arst_func_n
dig _m ux
ifir12_bypass
ifir35_bypass
Color
Space
Convertor
ifir
ifir
ifir
Clip
Scale
Multiplier
Display
Tim in g
Generator
dig _m ux
digbypass
Test Blo ck
csmouts
ifirouts
dmanouts
dtg_data
dg_bias
vs_out
hs_out
dlclko
do[9:0]
dg
db_bias
db
dr_bias
dr
clk_fx2
clk_f
cdrv
clk_h
clkin
tstm o d e
2X
cgen
clkin
Clock Generator
Offset Binary Signals
cscouts
THS8200
www.ti.com SLES032D –JUNE 2002–REVISED JUNE 2013
3 Functional Overview
Figure 3-1. Functional Block Diagram
Copyright © 2002–2013, Texas Instruments Incorporated Functional Overview 13
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