Datasheet

GAIN=
2R ||Z
P IN
2R +2R ||Z
O P IN
V
ADC FS
GAIN
V
AMP PP
=
THS770006
www.ti.com SBOS520B –JULY 2010–REVISED JANUARY 2012
Shifting the common-mode voltage with the resistor network comes at the expense of signal attenuation.
Modeling the ADC input as the parallel combination of a resistance (R
IN
) and capacitance (C
IN
) using values
taken from the ADC data sheet, the approximate differential input impedance (Z
IN
) for the ADC can be calculated
at the signal frequency. The effect of C
IN
on the overall calculation of gain is typically minimal and can be ignored
for simplicity (that is, Z
IN
= R
IN
). The ADC input impedance creates a divider with the resistor network; the gain
(attenuation) for this divider can be calculated by Equation 5:
(5)
With ADCs that have internal resistors that bias the ADC input to the ADC input common-mode voltage, the
effective R
IN
is equal to twice the value of the bias resistor. For example, the ADS5485 has a 1kΩ resistor tying
each input to the ADC V
CM
; therefore, the effective differential R
IN
is 2kΩ.
The introduction of the R
P
resistors also modifies the effective load seen by the amplifier. Equation 6 shows the
effective load seen by the amplifier:
R
L
= 2R
O
+ 2R
P
|| Z
IN
(6)
The R
P
resistors act in parallel to the ADC input such that the effective load (output current) seen by the amplifier
is increased. Higher current loads limit the THS770006 differential output swing.
Using the gain and knowing the full-scale input of the ADC (V
ADC FS
), the required amplitude to drive the ADC
with the network can be calculated using Equation 7:
(7)
Using the ADC examples given previously, Table 2 shows sample calculations of the value of R
P
and V
AMP FS
for
full-scale drive, and then for –1dB (often times, the ADC drive is backed off from full-scale in applications, so
lower amplitudes may be acceptable). All voltage values are in volts, resistor values in ohms (the nearest
standard value should be used), and gain values are as noted. Table 2 does not include the ADS5424 because
no level shift is required with this device.
Table 2. Example R
P
for Various ADCs
V
AMP PP
V
AMP PP
FOR FOR –1d
V
AMP
V
ADC
V
REF
ADC R
IN
R
O
R
P
GAIN GAIN V
ADC FS
0dBFS(V BFS
ADC (V
DC
) (V
DC
) (V
DC
) (Ω) (Ω) (Ω) (V/V) (dB) (V
PP
)
PP
) (V
PP
)
ADS5485 2.5 3.1 5 2k 50 158.3 0.73 –2.72 3 4.10 3.66
ADS6149 2.5 1.5 0 6k
(1)
50 75.0 0.59 –4.56 2 3.38 3.01
2.5 0.95 0 5k
(1)
50 30.6 0.38 –8.49 2 5.31 4.74
ADS4149 0
(2)
0.95 2.5 5k
(1)
50 81.6 0.61 –4.31 2 3.28 2.93
0
(2)
0.95 5 5k
(1)
50 213.2 0.79 –2.05 2 2.53 2.26
(1) At 70MHz.
(2) THS770006 with ±2.5V supply.
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