Datasheet

0.1 Fm
33pF
0.1 Fm0.1 Fm 6.8 Fm
33pF
1kW 1kW
24.9 W
24.9 W
THS7530
V
OUT
V
IN
V
S-
V
G-
V
CL-
V
CL+
V
OCM
V
G+
V
S+
=5V
PD
1:1
1:1
50 W
0.1 Fm
0.1 Fm
33pF
0.1 Fm
0.1 Fm0.1 Fm 6.8 Fm
0.1 Fm
33pF
1kW 1kW
24.9 W
49.9 W49.9 W
24.9 W
THS7530
V
OUT+
V
OUT-
V
IN
V
S-
V
G-
V
CL-
V
CL+
V
OCM
V
G+
V
S+
=5V
PD
0.1 Fm
0.1 Fm
0.1 Fm
33pF
0.1 Fm
0.1 Fm0.1 Fm 6.8 Fm
0.1 Fm
33pF
1kW 1kW
24.9 W
24.9 W24.9 W
24.9 W
THS7530
V
OUT+
V
IN-
V
OUT-
V
IN+
V
S-
V
G-
V
CL-
V
CL+
V
OCM
V
G+
V
S+
=5V
PD
THS7530
www.ti.com SLOS405C –DECEMBER 2002–REVISED FEBRUARY 2010
APPLICATION INFORMATION
The THS7530 is designed for nominal 5-V power Figure 20 through Figure 24 show some basic circuit
supply from V
S+
to V
S–
. configurations.
The amplifier has fully differential inputs, V
IN+
and
V
IN–
, and fully differential outputs, V
OUT+
and V
OUT–
The inputs are high impedance and outputs are low
impedance. External resistors are recommended for
impedance matching and termination purposes.
The inputs and outputs can be dc-coupled, but for
best performance, the input and output
common-mode voltage should be maintained at the
midpoint between the two supply pins. The output
common-mode voltage is controlled by the voltage
applied to V
OCM
. Left unterminated, V
OCM
is set to
midsupply by internal resistors. A 0.1-µF bypass
Figure 20. EVM Schematic: Designed for Use
capacitor should be placed between V
OCM
and with Typical 50-Ω RF Test Equipment
ground to reduce common-mode noise. The input
common-mode voltage defaults to midrail when left
unconnected. For voltages other than midrail,
V
OCM
must be biased by external means. V
IN+
and
V
IN–
both require a nominal 30-µA bias current for
proper operation. Therefore, ensure equal input
impedance at each input to avoid generating an offset
voltage that varies with gain.
Voltage applied from V
G–
to V
G+
controls the gain of
the part with 38.8-dB/V gain slope. The input can be
differential or single ended. V
G–
must be maintained
within –0.6 V and +0.8 V of V
S–
for proper operation.
The negative gain input should typically be tied
Figure 21. AC-Coupled Single-Ended Input with
directly to the negative power supply.
AC-Coupled Differential Output
V
CL+
and V
CL–
are inputs that limit the output voltage
swing of the amplifier. The voltages applied set an
absolute limit on the voltages at the output. Input
voltages at V
CL+
and V
CL–
clamp the output, ensuring
that neither output exceeds those values.
The power-down input is a TTL compatible input,
referenced to the negative supply voltage. A logic low
puts the THS7530 in power-saving mode. In
power-down mode the part consumes less than 1-mA
current, the output goes high impedance, and a high
amount of isolation is maintained between the input
and output.
Figure 22. AC-Coupled Differential Input with
Power-supply bypass capacitors are required for
AC-Coupled Differential Output
proper operation. A 6.8-µF tantalum bulk capacitor is
recommended if the amplifier is located far from the
power supply and may be shared among other
devices. A ceramic 0.1-µF capacitor is recommended
within 0.1-in of the device power pin. The ceramic
capacitors should be located on the same layer as
the amplifier to eliminate the use of vias between the
capacitors and the power pin.
Copyright © 2002–2010, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): THS7530