Datasheet
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14
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9
8
CVBSOUT
HD CH1OUT
HD CH2OUT
HDCH3OUT
V
S+
HDBYPASS
NC
CVBSIN
HDCH1IN
HDCH2IN
HDCH3IN
GND
DISABLE
NC
THS7373
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SBOS506A –DECEMBER 2009–REVISED AUGUST 2012
PIN CONFIGURATION
PW PACKAGE
TSSOP-14
(TOP VIEW)
NOTE: NC = No connection.
TERMINAL FUNCTIONS
TERMINAL
NAME NO. I/O DESCRIPTION
CVBS IN 1 I CVBS filter video input
HD CH.1 IN 2 I HD channels 1 video input
HD CH.2 IN 3 I HD channels 2 video input
HD CH.3 IN 4 I HD channels 3 video input
GND 5 I Ground pin for all internal circuitry
Disable pin. Logic high disables the part; logic low enables the part. This pin must not be left
DISABLE 6 I
floating. It must be connected to a defined logic state (or GND or VS+).
NC 7, 8 — No internal connection
Internal HD filter bypass. Logic high bypasses the internal HD low-pass filter; logic low uses the HD
HD BYPASS 9 I internal filters. This pin must not be left floating. It must be connected to a defined logic state (or
GND or VS+).
V
S+
10 I Positive power-supply pin; connect to +3 V to +5 V
HD CH.3
11 O HD channels 3 video output
OUT
HD CH.2
12 O HD channels 2 video output
OUT
HD CH.1
13 O HD channels 1 video output
OUT
CVBS OUT 14 O CVBS filter video output
Copyright © 2009–2012, Texas Instruments Incorporated 7