Datasheet

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2
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14
13
12
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10
9
8
CVBSOUT
DISABLECVBS
GND
DISABLEFHD
FHD1OUT
FHD2OUT
FHD3OUT
CVBSIN
NC
V
S+
NC
FHD1IN
FHD2IN
FHD3IN
THS7372
www.ti.com SBOS578 –AUGUST 2011
PIN CONFIGURATION
PW PACKAGE
TSSOP-14
(TOP VIEW)
NC = No connection.
TERMINAL FUNCTIONS
TERMINAL
NAME NO. I/O DESCRIPTION
CVBS IN 1 I Standard-definition video input for CVBS signal; LPF = 9.5 MHz
CVBS OUT 14 O Standard-definition video output for CVBS signal; LPF = 9.5 MHz
Disable Disable standard definition channel. Logic high disables the SD channel and logic low enables the
13 I
CVBS SD channel. This pin defaults to logic low if left open.
Disable full high-definition channels. Logic high disables the FHD channels and logic low enables
Disable FHD 11 I
the FHD channels. This pin defaults to logic low if left open.
FHD1 IN 5 I Full high-definition video input, channel 1; LPF = 72 MHz
FHD1 OUT 10 O Full high-definition video output, channel 1; LPF = 72 MHz
FHD2 IN 6 I Full high-definition video input, channel 2; LPF = 72 MHz
FHD2 OUT 9 O Full high-definition video output, channel 2; LPF = 72 MHz
FHD3 IN 7 I Full high-definition video input, channel 3; LPF = 72 MHz
FHD3 OUT 8 O Full high-definition video output, channel 3; LPF = 72 MHz
GND 12 I Ground pin for all internal circuitry
NC 2, 4 — No internal connection; it is recommended to connect NC to GND
V
S+
3 I Positive power-supply pin; connect to +2.7 V up to +5 V
Copyright © 2011, Texas Instruments Incorporated 7