Datasheet

THS7365
SBOS467 MARCH 2009 ..................................................................................................................................................................................................
www.ti.com
ELECTRICAL CHARACTERISTICS: V
S+
= +3.3 V (continued)
At T
A
= +25 ° C, R
L
= 150 to GND, Filter mode, and dc-coupled input/output, unless otherwise noted.
THS7365
TEST
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS LEVEL
(1)
AC PERFORMANCE (HD CHANNELS) (continued)
f = 30 MHz, Filter mode 1.7 C
Output impedance f = 30 MHz, Bypass mode 2 C
Disabled 1.8 || 3 k || pF C
Return loss f = 30 MHz, Filter mode 39 dB C
f = 1 MHz, HD to SD channels 74 dB C
Crosstalk f = 1 MHz, SD to HD channels 78 dB C
f = 1 MHz, HD to HD channels 70 dB C
DC PERFORMANCE
V
IN
= 0 V, SD channels 200 300 400 mV A
Biased output voltage
V
IN
= 0 V, HD channels 200 295 400 mV A
Input voltage range DC input, limited by output 0.1/1.46 V C
V
IN
= 0.1 V, SD channels 140 200 µ A A
Sync-tip clamp charge current
V
IN
= 0.1 V, HD channels 280 400 µ A A
Input impedance 800 || 2 k || pF C
OUTPUT CHARACTERISTICS
R
L
= 150 to +1.65 V 3.15 V C
R
L
= 150 to GND 2.85 3.1 V A
High output voltage swing
R
L
= 75 to +1.65 V 3.1 V C
R
L
= 75 to GND 3 V C
R
L
= 150 to +1.65 V (V
IN
= 0.2 V) 0.04 V C
R
L
= 150 to GND (V
IN
= 0.2 V) 0.03 0.1 V A
Low output voltage swing
R
L
= 75 to +1.65 V (V
IN
= 0.2 V) 0.1 V C
R
L
= 75 to GND (V
IN
= 0.2 V) 0.05 V C
Output current (sourcing) R
L
= 10 to +1.65 V 80 mA C
Output current (sinking) R
L
= 10 to +1.65 V 70 mA C
POWER SUPPLY
Operating voltage 2.6 3.3 5.5 V B
V
IN
= 0 V, all channels on 17 20.7 27 mA A
V
IN
= 0 V, SD channels on, HD channels off 5.6 6.9 9 mA A
Total quiescent current, no load
V
IN
= 0 V, SD channels off, HD channels on 11.4 13.8 18 mA A
V
IN
= 0 V, all channels off, V
DISABLE
= 3 V 0.1 10 µ A A
Power-supply rejection ratio
At dc 52 dB C
(PSRR)
LOGIC CHARACTERISTICS
(3)
V
IH
Disabled or Bypass mode 1.8 2 V A
V
IL
Enabled or Filter mode 0.65 0.7 V A
I
IH
0.2 µ A C
I
IL
0.2 µ A C
Disable time 100 ns C
Enable time 140 ns C
Bypass/filter switch time 5 ns C
(3) The logic input pins should not be left floating. They must be connected to logic low (or GND) or logic high (or V
S+
).
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