Datasheet

17
20
19
18
GND
16
CH.2 IN B
CH.3 IN B
15
I2C-A0
I2C-SDA
V
S+
11
14
13
12
I2C-SCLI2C-A1
CH.1 IN B
CH.2 IN A
CH.3 IN A
CH.1 IN A
NC
CH.3 OUT
CH.2 OUT
CH1.
GAIN ADJ
CH2.
GAIN ADJ
CH3.
GAIN ADJ
CH.1 OUT
NC
ADC/
Video
Decoder
3.3V
1
2
3
4
5
6
7
8
9
10
Ch.1
Ch.2
Ch.3
75 W
75 W
75 W
75 W
75 W
75 W
0.1 Fm
0.01 Fm
100 Fm
0.1 Fm
0.1 Fm
Y’
P’
B
P’
R
C
I
C
I
C
I
0.1 Fm
1 Fm
1 Fm
+
+Vs
I C
Controller
2
HDTV
480i
576i
480p
576p
720p
1080i
1080p
G’B’R’
ACBIAS
ACBIAS
ACBIAS
ACSTC
ACSTC
ACSTC
External
Input
CBVS
S-VideoC’
S-Video Y’
THS7353
SLOS484B NOVEMBER 2005REVISED AUGUST 2012
www.ti.com
placed first in the system. Since the blue color difference channel (P'
B
) is next and the red color difference
channel (P'
R
) is last, then it also makes logical sense to place the B' signal on the second channel and the R'
signal on the third channel respectfully. Thus hardware compatibility is better achieved when using G'B'R' rather
than R'G'B'. Note that for many G'B'R' systems sync is embedded on all three channels, but may not always be
the case in all systems.
A. Due to the high frequency content of the video signal, it is recommended, but not required, to add a 0.01-μF capacitor
in parallel with these large capacitors.
Figure 59. Typical HDTV + SDTV Inputs Buffering a Video ADC / Decoder
INPUT MODES OF OPERATION – DC
The inputs to the THS7353 allows for both ac coupled and dc coupled inputs. Many DACs or video encoders can
be dc connected to the THS7353. But, one of the drawbacks to dc coupling is when 0 V is applied to the input of
the THS7353. Although the input of the THS7353 allows for a 0-V input signal, the output swing of the THS7353
cannot yield a 0-V signal. This applies to any traditional single-supply amplifier due to the limitations of the output
transistors. Both CMOS and bipolar transistors cannot go to 0 V while sinking a finite amount of current. This trait
of a transistor is also the same reason why the highest output voltage is always less than the power supply
voltage when sourcing a significant amount of current.
The signal gain is externally set from 0 dB (1 V/V) to 14 dB (5 V/V), and dictates what the allowable linear input
voltage range or output voltage range is without clipping concerns. For example, if the power supply is set to 3 V
with gain set to 6 dB, the maximum output is about 2.9 V. Thus, to avoid clipping, the allowable input is 2.9 V / 2
= 1.45 V. This is true for a 5-V power supply that allows about a 4.9 V / 2 = 2.45 V input range while avoiding
clipping on the output. But, if the gain is set to 0 dB, the allowable input range is dictated by the input range and
not the output range. This is about 2.1-V for a 3.3-V supply and 3.4-V for a 5-V supply.
22 Copyright © 2005–2012, Texas Instruments Incorporated