Datasheet

THS7347
SLOS531B MAY 2007 REVISED OCTOBER 2011
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WRITE AND READ EXAMPLES
These examples illustrate the proper way to write to and read from the THS7347.
WRITING TO THE THS7347
An I
2
C master initiates a write operation to the THS7347 by generating a start condition (S) followed by the
THS7347 I
2
C address, in MSB-first order, followed by a '0' to indicate a write cycle. After receiving an
acknowledge from the THS7347, the master presents the subaddress (channel) it wants to write, consisting of
one byte of data, MSB first. The THS7347 acknowledges the byte after completion of the transfer. Finally, the
master presents the data it wants to write to the register (channel) and the THS7347 acknowledges the byte. The
I
2
C master then terminates the write operation by generating a stop condition (P). Note that the THS7347 does
not support multi-byte transfers. To write to all three channels (or registers), this procedure must be repeated for
each register, one series at a time (that is, repeat steps 1 through 8 for each channel).
Step 1 0
I
2
C Start (Master) S
Step 2 7 6 5 4 3 2 1 0
I
2
C General Address (Master) 0 1 0 1 1 X X 0
Where each X logic state is defined by I
2
C-A1 and I
2
C-A0 pins being tied to either V
DD
or GND.
Step 3 9
I
2
C Acknowledge (Slave) A
Step 4 7 6 5 4 3 2 1 0
I
2
C Write Channel Address (Master) 0 0 0 0 0 Addr Addr Addr
Where Addr is determined by the values shown in Table 2.
Step 5 9
I
2
C Acknowledge (Slave) A
Step 6 7 6 5 4 3 2 1 0
I
2
C Write Data (Master) Data Data Data Data Data Data Data Data
Where Data is determined by the values shown in Table 3.
Step 7 9
I
2
C Acknowledge (Slave) A
Step 8 0
I
2
C Stop (Master) P
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