Datasheet
www.ti.com
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
RECOMMENDED OPERATING CONDITIONS
THS7316
SLOS521A – MARCH 2007 – REVISED JANUARY 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGING/ORDERING INFORMATION
PACKAGED DEVICES PACKAGE TYPE
(1)
TRANSPORT MEDIA, QUANTITY
THS7316D Rails, 75
SOIC-8
THS7316DR Tape and Reel, 2500
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com .
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE UNIT
Supply voltage, V
S+
to GND 5.5 V
V
I
Input voltage – 0.4 V to V
S+
V
I
O
Output current ± 90 mA
Continuous power dissipation See Dissipation Rating Table
T
J
Maximum junction temperature, any condition
(2)
150 ° C
T
J
Maximum junction temperature, continuous operation, long term reliability
(3)
125 ° C
T
stg
Storage temperature range – 65 to 150 ° C
HBM 2000
ESD ratings CDM 1500 V
MM 200
(1) Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may degrade device reliability.
(2) The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process.
(3) The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this
temperature may result in reduced reliability and/or lifetime of the device.
POWER RATING
(1)
θ
JC
θ
JA
(T
J
= 125 ° C)
PACKAGE
( ° C/W) ( ° C/W)
T
A
= 25 ° C T
A
= 85 ° C
SOIC-8 (D) 16.8 130
(2)
769 mW 308 mW
(1) Power rating is determined with a junction temperature of 125 ° C. This is the point where performance starts to degrade and long-term
reliability starts to be reduced. Thermal management of the final PCB should strive to keep the junction temperature at or below 125 ° C
for best performance and reliability.
(2) This data was taken with the JEDEC High-K test PCB. For the JEDEC low-K test PCB, the θ
JA
is 196 ° C/W.
MIN MAX UNIT
V
S+
Supply voltage 3 5 V
T
A
Ambient temperature – 40 85 ° C
2 Submit Documentation Feedback Copyright © 2007 – 2008, Texas Instruments Incorporated
Product Folder Link(s) :THS7316