Datasheet

InputPin
Input
Rpd
(SeeNote A)
Rpu
(SeeNote A)
75kW
25kW
C
I
Internal
Circuitry
V
S+
V
S+
V
S+
THS7303
SLOS479B – OCTOBER 2005– REVISED MARCH 2011 www.ti.com
INPUT MODES OF OPERATION: AC BIAS
Other applications require an ac-coupled input. The ac-coupling ensures that a source dc-input bias level does
not alter, or clip, the resulting output video signal. The first ac-coupling mode is the AC Bias mode, where a
simple internal dc bias voltage is applied to the input signal on the THS7303-side of the external coupling
capacitor.
The applied dc bias voltage is set internally by a simple resistor divider circuit, as shown in Figure 62. The dc
bias voltage is set to V
S+
/ 4. With a 3.3-V power supply, the input bias voltage is nominally 0.825 V; with 5-V
supply, the input bias voltage is nominally 1.25 V. The input impedance with this mode is approximately 19-kΩ.
With a 1-μF input capacitor, it sets a high-pass corner frequency of about 9 Hz. If a lower frequency is desired,
increasing the capacitor decreases the corner frequency proportionally. For example, using a 4.7-μF capacitor
results in a 1.8-Hz high-pass corner frequency, and results in lower droop (tilt). Using any capacitor value is
acceptable for this mode of operation.
A. Use external pull-up and/or pull-down resistors if changing the ac-bias input voltage is desired.
Figure 62. Equivalent AC Bias Input Mode Circuit
It is sometimes desirable to adjust the bias voltage to another level other than the one dictated by the internal
resistors. There are two ways this adjustment is accomplished:
1. The first method is to add an external resistor between the input pin and either the V
S+
or GND. This creates
a new bias voltage equal to V
S+
× [25 k / {25 k + (75 k || R
PU
)}] for raising the bias voltage, or V
S+
× [(25 k ||
R
PD
) / {(25 k || R
PD
) + 75 k}] for reducing the bias voltage.
2. The second method to set the ac bias voltage is to use the R
PU
and R
PD
external resistors, but place the
THS7303 in dc input bias mode. Because the dc mode is very high impedance, the resulting bias voltage is
equal to approximately V
S+
× (R
PD
/ {R
PD
+ R
PU
}). Due to the input bias current, there will be a difference
between the true dc bias voltage and the theoretical bias voltage.
This mode of operation is recommended for use with chroma (C’), P’
B
, P’
R
, U’, V’, and other non-sync signals.
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Product Folder Link(s): THS7303