Datasheet

 
  
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SLOS214C − OCTOBER 1998 − REVISED MARCH 2007
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
block diagram
_
+
PREAMP V
CC+
PREAMP A IN+
PREAMP A IN−
SHDN−A
Preamp
PREAMP
OUT A
PGA−A
IN−
G
2
AG
1
AG
0
APGA−A REF
PGA
V
CC+
PGA−B
GND
PGA
V
CC−
CLAMP+ (V
H
)
CLAMP− (V
L
)
PGA−A OUT
_
+
_
PREAMP V
CC−
PREAMP B IN−
PREAMP B IN+
SHDN−B
Preamp
PREAMP
OUT B
PGA−B REF
PGA−B OUT
+
G
2
BG
1
BG
0
B
PGA−A
GND
_
+
PGA−B
IN−
Figure 2. THS7002 Dual Channel PGA
input preamp
To achieve the minimum input equivalent noise required for very small input signals, the input preamp is
configured as a classic voltage feedback amplifier with a minimum gain of 2 or −1. The output of the preamp
is accessible, allowing for adjustment of gain using external resistors and for external filtering between the
preamp and the PGA.
programmable gain amplifier (PGA)
The PGA is an inverting, programmable gain amplifier. The gain is digitally programmable using three control
bits (TTL-compatible terminals) that are encoded to provide eight distinct levels of gain/attenuation. Nominal
gain/attenuation is shown in Table 1.
Table 1. Nominal Gain/Attenuation
G
2
G
1
G
0
PGA GAIN
(dB)
PGA GAIN
(V/V)
0 0 0 −22 0.08
0 0 1 −16 0.16
0 1 0 −10 0.32
0 1 1 −4 0.63
1 0 0 2 1.26
1 0 1 8 2.52
1 1 0 14 5.01
1 1 1 20 10.0