THS7002 ProgrammableĆGain Amplifier Evaluation Module User’s Guide July 1999 Mixed-Signal Products SLOU037
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete.
Preface Related Documentation From Texas Instruments J J J THS7002 PROGRAMMABLE-GAIN AMPLIFIER (literature number SLOS214) This is the data sheet for the THS7002 amplifier integrated circuit used on the EVM. THS4001 HIGH-SPEED LOW-POWER OPERATIONAL AMPLIFIER (literature number SLOS206) This is the data sheet for the THS4001 amplifier integrated circuit used on the EVM.
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Running Title—Attribute Reference Contents 1 General Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.
Running Title—Attribute Reference Figures 1–1 1–2 1–3 1–4 1–5 1–6 1–7 1–8 1–9 1–10 1–11 1–12 1–13 2–1 2–2 2–3 2–4 THS7002 Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 THS7002 EVM Power Conditioning Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 THS7002 EVM Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1 General Information This chapter details the Texas Instruments (TI) THS7002 programmable-gain amplifier evaluation module (EVM), SLOP136. It includes a list of EVM features, a brief description of the module illustrated with pictorial and schematic diagrams, EVM specifications, details on configuring, connecting, and using the EVM, and a discussion on high-speed amplifier and PowerPAD package design considerations. Topic Page 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features 1.
Description Figure 1–1. THS7002 Evaluation Module SLOP136 Rev.
J7 Input B J6 Input A R16 49.9 Ω R2 1 kΩ R9 49.9 Ω R7 499 Ω 3 2 6 5 R1 1 kΩ C3, 0.1 µF C2, 0.1 µF 4 –15 V + – 7 15 V C1, TBD C11 0.1 µF 4 U1-A THS7002 C12, 0.1 µF R8 499 Ω U2 THS4001 5 7 –15 V + – 8 15 V JP3 R4 22 Ω R5 49.9 Ω JP1 3 2 2 JP2 R3 TBD 3 2 R30 3.3 kΩ C9 TBD R10 499 Ω R13 TBD VIN– 9 10 5V + – U1-C R11 499 Ω R17 49.9 Ω 11 S1-D R29 330 Ω C10, TBD –15 V AS/D TP7 C18, 0.1 µF C7 TBD 3 C19, 0.1 µF R23, 330 Ω 23 24 1 JP4 S1-E R31 49.
Description The THS7002 EVM is equipped with a separate BNC input connector for each of the two channels on the module. Each input is terminated with a 50-Ω resistor to provide correct line impedance matching (Figure 1–3). Note that using a source with a 50-Ω output impedance will create a voltage divider at the EVM inputs. Thus, accurate knowledge of the source output characteristics is required to determine proper input signal amplitudes.
Description The shutdown feature of the THS7002 IC is implemented on this EVM. There is a separate shutdown pin for each half of the THS7002 IC. The shutdown signals are low for normal THS7002 operation. When a shutdown pin is high (5 V), the corresponding preamplifier and PGA section is turned off.
Programmable Gain Amplifier Gain Control 1.3 Programmable Gain Amplifier Gain Control Each channel of the THS7002 IC is provided with three digital control inputs for setting the gain of the PGA stage (AG0 – AG2 and BG0 – BG2). Standard TTL or CMOS Logic signals operate these control inputs. The gain control inputs are not latched and respond to the control signals in real time. Therefore, the control signals on these inputs must remain constant if the PGA gain is to remain constant.
Programmable Gain Amplifier Gain Control Figure 1–4. Simplified PGA Section of the THS7002 No Source Impedance VIN G0 G1 G2 PGA –VIN RSOURCE RG THS7002 IC RF Positive Clamp VH RTERMINATION – PGA PGA VREF + PGA VOUT Negative Clamp VL The PGA VREF terminals are also accessible via test points TP8 and TP14. Typically, the DIP switches are used to keep this point at ground.
EVM DIP Switch Functionality 1.4 EVM DIP Switch Functionality The THS7002 can be fully evaluated without any external digital control signals applied. This is accomplished through the use of two banks of DIP switches. Each DIP switch bank incorporates six SPST switches labeled A through F. The functionality of each switch is described in Table 1–2. Table 1–2.
EVM Circuit Configuration 1.5 EVM Circuit Configuration The THS7002 EVM design allows evaluation of each section of the THS7002 amplifier IC separately as well as a differential system. Configuration of the EVM is accomplished through jumpers mounted on the module PCB. Each jumper is a three-pin header that acts as an SPDT switch when a shunt is placed across two of the three pins to select either of two signal routes (Figure 1–5). Figure 1–5.
EVM Circuit Configuration - Jumper JP4: J J - 1–2 — Connects the input of the B-channel PGA (U1: D) to the signal from JP3 2–3 — Connects the input of the B-channel PGA (U1: D) to the output of the B-channel preamplifier (U1:C) Jumper JP5: J J 1–2 — Connects the THS7002 IC positive clamp input pin (VH) to Vcc when switch S2:F is set appropriately 2–3 — Connects the THS7002 IC positive clamp input pin (VH) to +5V when switch S2:F is set appropriately For example, to use a single-ended input and use
Using the THS7002 EVM 1.6 Using the THS7002 EVM The THS7002 EVM operates from a split power supply with voltages ranging from ± 5 V to ± 15 V. It also uses 5 volt logic control signals to configure the operation of the EVM when the DIP switches are used. The use of a single supply for this EVM is not recommended. As shipped, the preamplifiers are set to a gain of 2 and the EVM is configured for a single-ended input that uses the preamplifiers to directly drive the PGA stages.
THS7002 EVM Performance 1.7 THS7002 EVM Performance Figure 1–6 shows the typical frequency response and Figure 1–7 shows the typical phase response of the THS7002 EVM preamplifiers. Typical –3 dB bandwidth with a ± 15-V power supply is 100 MHz for the preamplifier in each channel and 90 MHz with a ± 5-V power supply. Figure 1–6. THS7002 EVM Preamplifier Frequency Response 7 VCC = ±15 V Output Amplitude – dB 6 5 4 3 VCC = ±5 V 2 1 VO = 0.
THS7002 EVM Performance Figure 1–8 shows the typical frequency response and Figure 1–9 shows the typical phase response of the THS7002 EVM PGAs. This data was collected with the gain set to +2 dB. Typical – 3 dB bandwidth is 65 MHz with a ± 5-V power supply and 70 MHz with a ± 15-V power supply. Figure 1–8. THS7002 EVM PGA Frequency Response 4 Output Amplitude – dB 3 VCC = ±15 V 2 1 0 VCC = ±5 V –1 –2 VO = 0.4 Vp–p RL = 500 Ω –3 100k 1M 10M 100M 500M f – Frequency – Hz Figure 1–9.
THS7002 EVM Performance Figure 1–10 shows the typical frequency response and Figure 1–11 shows the typical phase response of the THS7002 EVM preamplifiers + PGAs. This data was collected with the preamplifiers directly driving the PGA inputs. The PGA was set to a gain of +2 dB. Typical – 3 dB bandwidth is 65 MHz with a ± 5-V power supply and 70 MHz with a ± 15-V power supply. Figure 1–10.
General High-Speed Amplifier Design Considerations 1.8 General High-Speed Amplifier Design Considerations The THS7002 EVM layout has been designed and optimized for use with high-speed signals and can be used as an example when designing THS7002 applications. Careful attention has been given to component selection, grounding, power supply bypassing, and signal path layout.
General PowerPAD t Design Considerations t Design Considerations 1.9 General PowerPAD The THS7002 IC is mounted in a special package incorporating a thermal pad that transfers heat from the IC die directly to the PCB. The PowerPAD package is constructed using a downset leadframe. The die is mounted on the leadframe but is electrically isolated from it. The bottom surface of the lead-frame is exposed as a metal thermal pad on the underside of the package and makes physical contact with the PCB.
General PowerPAD t Design Considerations 6) The top-side solder mask should leave exposed the terminals of the package and the thermal pad area with its holes. Any larger holes outside the thermal pad area, but still under the package, should be covered with solder mask. 7) Apply solder paste to the exposed thermal pad area and all of the operational amplifier terminals.
General PowerPAD t Design Considerations Even though the THS7002 EVM PCB is different than the one in the example above, the results should give an idea of how much power can be dissipated by the PowerPAD IC package. The THS7002 EVM is a good example of proper thermal management when using PowerPAD-mounted devices. Correct PCB layout and manufacturing techniques are critical for achieving adequate transfer of heat away from the PowerPAD IC package.
THS7002 EVM Specifications 1.10 THS7002 EVM Specifications Supply voltage range, ± VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 V to ± 15 V Supply current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 mA, typ Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2 Reference This chapter includes a parts list and PCB layout illustrations for the THS7002 EVM. Topic Page 2.1 THS7002 Dual Differential Line Drivers and Receivers EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 2.2 THS7002 EVM Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
THS7002 Programmable-Gain Amplifier EVM Parts List 2.1 THS7002 Programmable-Gain Amplifier EVM Parts List Table 2–1. THS7002 EVM Parts List Qty Manufacturer/Distributor Part Number 3 (SPRAGUE) 293D685X9035D2T 8 (MuRata) GRM40–X7R104K25 INDUCTOR, 0.22 µH AXIAL, THRU HOLE 2 (DELEVAN) DN41221/ (DIGI-KEY) DN41221-ND J5 – J10 CONNECTOR, BNC 50 OHM VERTICAL PC MOUNT, THRU HOLE 6 (MOUSER) 523–31–5329 J1 – J4 JACK, BANANA RECEPTACLE, FOR 0.025″ DIA.
THS7002 EVM Board Layouts 2.2 THS7002 EVM Board Layouts Board layout examples of the THS7002 EVM PCB are shown in the following illustrations. They are not to scale and appear here only as a reference. Figure 2–1. THS7002 EVM Component Placement Silkscreen and Solder Pads THS7002 EVM Board SLOP136 Rev.
THS7002 EVM Board Layouts Figure 2–2. THS7002 EVM PC Board: Top Assembly Figure 2–3.
THS7002 EVM Board Layouts Figure 2–4.
2-6 Reference
