Datasheet

THS6214
www.ti.com ....................................................................................................................................................................................................... SBOS431 – MAY 2009
ELECTRICAL CHARACTERISTICS: V
S
= ± 6V (continued)
At T
A
= +25 ° C, G
DIFF
= +5V/V with R
L
= 100 Ω differential load, R
ADJ
= 0 Ω , active impedance circuit configuration, and full bias,
unless otherwise noted. Each port is independently tested.
THS6214IRHF, IPWP
TEST
PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL
(1)
LOGIC
Logic 1, with respect to GND
(3)
, T
A
= – 40 ° C to +85 ° C 1.9 V B
Bias control pin logic threshold
Logic 0, with respect to GND
(3)
, T
A
= – 40 ° C to +85 ° C 0.8 V B
Bias-1, Bias-2 = 0.5V (logic 0) 20 30 µ A A
T
A
= – 40 ° C to +85 ° C 35 µ A B
Bias pin quiescent current
Bias-1, Bias-2 = 3.3V (logic 1) 0.3 1 µ A A
T
A
= – 40 ° C to +85 ° C 1.2 µ A B
Turn-on time delay (t
ON
) Time for I
S
to reach 50% of final value 1 µ s C
Turn-off time delay (t
OFF
) Time for I
S
to reach 50% of final value 1 µ s C
Bias pin input impedance 50 k Ω C
Amplifier output impedance Off bias (Bias-1 = 1, Bias-2 = 1) 10 || 5 k Ω || pF C
(3) The GND pin usable range is from V
S –
to (V
S+
– 5V).
Table 1. Logic Table
BIAS-1 BIAS-2 FUNCTION DESCRIPTION
0 0 Full bias mode (100%) Amplifiers on with lowest distortion possible (default state)
1 0 Mid bias mode (75%) Amplifiers on with power savings and a reduction in distortion performance
0 1 Low bias mode (50%) Amplifiers on with enhanced power savings and a reduction of overall performance
1 1 Shutdown mode Amplifiers off and output has high impedance
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